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Title A Design of Lightweight Regular Expression Matching Accelerator Architecture for Embedding in Solid State Drives
Authors 정원섭(Won Seob Jeong) ; 노원우(Won Woo Ro)
DOI https://doi.org/10.5573/ieie.2019.56.9.26
Page pp.26-31
ISSN 2287-5026
Keywords In-storage processing, Solid state drives, Regular expression matching, Accelerator
Abstract This paper presents a lightweight regular expression (regexp) matching accelerator architecture for embedding in a solid state drive (SSD). In-storage processing (ISP) is a technique to offload data-centric applications to the storage device for high data processing performance. Adopting the ISP technique for regexp matching can improve matching performance. However, achieving high regexp matching performance using the embedded CPU in an SSD is challenging. Also, embedding previously proposed finite state machine (FSM) based regexp matching accelerators can induce hardware cost problem since the accelerators leverage on-chip memory intensively to store the state transition information of FSM. We propose a regexp accelerator architecture that employs simple hardware pattern matching modules and attains matching performance which corresponds to internal data transfer bandwidth of an SSD. Moreover, we propose a technique to reduce on-chip memory overhead by sharing the memory between the matching modules. We implement our accelerator architecture using computer system architecture simulator and evaluate the matching performance improvement of the accelerator. The results show that the accelerator achieves maximum 194% matching performance improvement compared to the conventional computer system. In addition, the accelerator requires 56.8% less on-chip memory area compared to the baseline matching module.