| Title |
3D TCAD Analysis of OFF-State Stress in 3-nm node Nanoplate FETs |
| Authors |
유예지(Yeaji Yoo) ; 전종욱(Jongwook Jeon) ; 강명곤(Myounggon Kang) ; 신형철(Hyungcheol Shin) |
| DOI |
https://doi.org/10.5573/ieie.2019.56.10.19 |
| Keywords |
Nanoplate FET(NPFET); TCAD; Off-State Stress(OSS); Interface Traps; Oxide degradation |
| Abstract |
In this paper, the physical mechanism and characteristics of OFF-State Sress(OSS) in 3-nm NPFET have been investigated. Gate-All-Around (GAA) Nanoplate(NP) devices have been proposed as potential candidates in nano-scale for the resolution of Short Channel Effect (SCE) with the reduction of transistor technology nodes. However, due to the influence of the hot hole injection and the trapped charge through OSS, it is inevitable to change the characteristics of the device and increase the leakage current. Thus, the analysis of OSS in nanoplate devices was carried out using TCAD simulation. and the importance of OSS-degradation analysis in ultra-scaled NPFETs is also presented. |