| Title |
Body-channel Communication Packet Transceiver with Sample-and-Hold PLL |
| Authors |
김태형(Taehyoung Kim) ; 한건희(Gunhee Han) |
| DOI |
https://doi.org/10.5573/ieie.2019.56.11.31 |
| Keywords |
Body-channel communication ; Capacitive-coupling mechanism ; Dry electrode ; Sample-and-hold PLL ; Packet communication ; |
| Abstract |
In this paper, we propose a body channel communication transceiver utilizing dry electrodes and operating at a carrier frequency of capacitive-coupling mechanism region. Packet communication method was introduced to reduce bit error caused by unstable contact of a dry electrode, and a sample-and-hold PLL was introduced to the receiver to realize packet communication with a low carrier frequency by reducing PLL settling time. The proposed transceiver was manufactured using a 0.25μm CMOS process. Measured settling time of PLL was reduced by about 20 times with sample-and-hold PLL operation. The transceiver with 2 Mbps speed operates at a 2.5 V supply voltage, resulting in the current consumption of 0.1, 0.94, 0.52 and 4 mA at the transmitter, carrier generator, sample-and-hold PLL and receiver, respectively. The total area of the chip core is 0.15 mm2. |