| Title |
Mitigation of Self-heating Effects in 3 nm Node Nanoplate-FET |
| Authors |
김현우(Hyunwoo Kim) ; 전종욱(Jongwook Jeon) ; 강명곤(Myounggon Kang) ; 신형철(Hyungcheol Shin) |
| DOI |
https://doi.org/10.5573/ieie.2020.57.2.21 |
| Keywords |
3nm node ; Corner spacer ; Gate all around FET ; Nanoplate ; Self-heating ; |
| Abstract |
As the semiconductor device becomes finer and smaller, the heat density per unit area is increasing. And the recently used high-k material has a low thermal conductivity which makes the heat worse and the GAA structure to be used also makes the heat release more difficult. In this study, we compared how the self-heating effect of the spacer structure changes with respect to the Nanoplate-FET, which is one of the next-generation GAA structures. The Dual-k Spacer and Air Sapcer structures are used to improve the electrical characteristics of the device, but deteriorate the thermal properties of the device. It is confirmed that Corner Spacer which has excellent electrical performance but is not well known can be a way to solve this problem, and the structure showing thermally important characteristics is confirmed in Corner Spacer. It is also confirmed that the asymmetric structure can improve the thermal properties. |