| Title |
In-memory Accelerator for Irregular Memory Access to Linked Data Structures |
| Authors |
윤추실(Qiu-Shi Yin) ; 한태희(Tae-Hee Han) |
| DOI |
https://doi.org/10.5573/ieie.2020.57.5.37 |
| Keywords |
연결 리스트; 3D 스택 메모리; 인?메모리 가속기 |
| Abstract |
The basic data structures, such as linked lists, trees, and hash tables, have linear formats that use pointers to connect adjacent nodes. Pointer-based data structures and link traversal algorithms are integral parts of programming and allow the nodes to be added or deleted dynamically. The list node can only search for data sequentially, limiting the parallelism of the CPU. We propose an accelerator structure that adds an in-memory accelerator to perform searching of linked lists in memory. The proposed accelerator was modeled using the gem5 simulator and evaluated through the Memcached and Graph500 benchmarks. The execution time was reduced by an average of 13.8% and the memory access times was reduced by an average of 17.85% compared to the results executed by the baseline CPU. The proposed in-memory accelerator was synthesized with Design Compiler using TSMC 28nm process library, which has a total of 16172 cells, and there is an additional overhead of about 10% compared to the Cortex A53 area used by the baseline CPU. |