| Title |
Energy-Efficient Reconfigurable CNN Accelerator Architectureusing Filter Decomposition Technique |
| Authors |
최동우(Dong Woo Choi) ; 이한호(Hanho Lee) |
| DOI |
https://doi.org/10.5573/ieie.2020.57.7.22 |
| Keywords |
Convolutional neural network; accelerator; energy efficiency; filter decompositon; RS dataflow |
| Abstract |
This paper shows a Row Stationary (RS) dataflow and Spatial Reduction (SR) structure based reconfigurable Convolutional Neural Network (CNN) accelerator architecture for edge device. The proposed energy-efficient reconfigurable CNN accelerator using filter decomposition technique shows improved data throughput over existing RS dataflow-based CNN accelerator as well as high energy efficiency. The proposed energy-efficient reconfigurable CNN accelerator can compute convolution operation with different sizes of filter in low area. The data throughput of proposed energy-efficient reconfigurable CNN accelerator is 168.7 Giga Operation per Second (GOPS) and the energy-efficiency is 35.14GOP/J. The proposed energy-efficient reconfigurable CNN accelerator using filter decomposition techniques was implemented on FPGA Virtex-7. It has a 187 to 247% improvement in energy efficiency compared to other FPGA-based CNN accelerators and a 251% improvement in data throughput compared to existing RS data flow-based CNN accelerators. Thus, the proposed structure can be used for CNN computation in edge device that require low-power driving. |