| Title |
Case Study of Software Power Analysis based on Power Emulation |
| Authors |
정현우(Hyunwoo Chung) ; 이준환(Joonhwan Yi) |
| DOI |
https://doi.org/10.5573/ieie.2020.57.10.65 |
| Keywords |
Power emulation; Power model; Power analysis; Software power; Hardware-software partitioning |
| Abstract |
Abstract We demonstrate that power emulation enables fast and accurate software power analysis by using a case design. The previously proposed power calculator is used. Power emulation unit (PEU) has been proposed to verify the generated power calculators on FPGA with the same conditions for gate-level power analysis. Using the verified power calculators, power emulation for the case design employing a processor and a floating point unit has been performed. Multiple floating point arithmetic operations have been performed by two systems: pure-software and hardware-software partitioned. Experimental results show that the hardware-software partitioned system executes more than four times faster than the pure-software one with more than 58% less energy consumption. |