| Title |
Timing Mismatch Calibration of TI-ADC in an Undersampling Environment |
| Authors |
설수민(Sumin Seol) ; 라동준(Dongjun Na) ; 서원기(Won-Gi Seo) ; 심홍석(Hongsuk Shim) ; 최권휴(Kwonhue Choi) |
| Keywords |
Analog-to-digital converter (ADC); Time-interleaved analog-digital-converter (TI-ADC); Timing mismatch; Undersampling; Fractional delay filter |
| Abstract |
Time-interleaved analog-digital-converter(TI-ADC) is a scheme that increases sampling frequency by operating several analog-digital-converter(ADC) channels in parallel. Timing mismatch between ADC channels in TI-ADC results in nonlinear components and reduces spurious free dynamic range (SFDR) performance. The existing fractional delay filter(FDF) can calibrate timing mismatchs of TI-ADC under the oversampling conditions. However, under undersampling conditions, existing FDF cannot calibrate timing mismatchs. In this paper, we analyze why existing FDF cannot calibrate timing mismatchs of the TI-ADC under the undersampling conditions, and propose the new FDF scheme that can calibrate timing mismatchs unter the undersampling conditions. To this end, we first propose a timing mismatch detection algorithm using a phase difference due to timing mismatch between ADC channels, and derive a frequency response of the FDF that can calibrate timing mismatch under the undersampling conditions. The frequency response of the proposed FDF is derived as an equation according to the frequency of input signal. Performance simulations show that the proposed FDF improves the SFDR performance of TI-ADC by reducing nonlinear components under the undersampling conditions. |