| Title |
Design of CMOS RC Oscillator with Low PVT Effect and Digitally Frequency-calibrated |
| DOI |
https://doi.org/10.5573/ieie.2023.60.3.19 |
| Keywords |
CMOS RC oscilllator; PVT compensation; Digitally trimmable |
| Abstract |
A CMOS RC oscillator that is less affected by process(P), voltage(V), and temperature(T) changes and can be digitally compensated for frequency is designed. The oscillator consists of four switches, two comparators and capacitors, and a latch circuit. The operation principle is to charge the capacitor with the supply voltage VDD by two CMOS switches on the left and the right, discharge it to the voltage (VDD-VR), and detect the charge/discharge time in the comparator and send it to the latch circuit to oscillate. The bias circuit was designed so that the discharge current used in the oscillator, the bias voltage of the comparator, and the bias current of the compensation circuit were less affected by the supply voltage and temperature. In addition, the oscillation frequency was corrected by digitally varying the resistance value in order to reduce the influence of the process change. As a result of the simulation, it was confirmed that the oscillation frequency of the proposed RC oscillator has a change rate of up to ±2% for process(P) variables, supply(V) voltage changes, and temperature(T) changes. The proposed circuit was designed and verified using 0.35μm CMOS process parameters, and the power consumption is 2mW when the supply voltage is 3.5V. |