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Title Design of A Reconfigurable SAR/SS Analog to Digital Converter with Jump Search Algorithm
Authors 편집부(Editor)
DOI https://doi.org/10.5573/ieie.2023.60.6.35
Page pp.35-41
ISSN 2287-5026
Keywords Jump search algorithm; Reconfigurable; Hybrid; ADC
Abstract This paper proposes an ADC that applies jump-search algorithm to a reconfigurable SAR/SS ADC structure for biosignal processing. The hybrid structure is designed by applying the conventional SAR ADC logic to the upper bits and linearly applying voltages corresponding to the lower bits of SS to dummy capacitors. The proposed ADC is also designed to allow for the selection of 12-bit and 14-bit resolutions using external input signals. The ADC was implemented using CMOS 28nm process technology and 1-poly 8-metal. Simulation results show that the operating speed is 454 kS/s, power consumption is 17.9 uW, ENoB is 11.8 bits, and FoM is 11.3 fJ/setp.