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Title A Design of Low Power LDO Regulator using Comparator-RC for IoT Application
Authors 김세은(Se-Eun Kim) ; 손상희(Sang-Hee Son) ; 박지만(Ji-Mann Park)
DOI https://doi.org/10.5573/ieie.2024.61.2.67
Page pp.67-74
ISSN 2287-5026
Keywords LDO; Low power; Digital LDO; Comparator; RC time constant
Abstract This paper proposes a low power low-dropout regulator (LDO) circuit using a comparator-RC for IoT application services. This LDO is a digital-analog hybrid circuit implementing an analog error amplifier as a comparator-RC. The gate voltage of the pass transistor is converted from a digital value to an analog constant voltage by the charging and discharging of the RC time constant circuit inserted into the output terminal of the comparator. The gate voltage of this pass transistor is controlled based on the feedback system to keep the output voltage of the LDO regulator constant. The proposed circuit was simulated using the TSMC 0.18um CMOS process variable. Therefore, the input voltage range is 1.1V to 3V, the dropout voltage is 100mV, and the maximum load current is 50mA. The standby current of LDO is low power from the input voltage 1.1V to 632nA. The proposed LDO in this paper is shown to be driven at low voltage and low power and will be widely applied for the smart sensor device systems.