| Title |
Design of Real-time Mapping Circuit for High-speed FHD Image Stitching |
| Authors |
이효연(Hyoyeon Lee) ; 조경순(Kyeongsoon Cho) |
| DOI |
https://doi.org/10.5573/ieie.2024.61.12.42 |
| Keywords |
Image stitching; FHD image; Mapping; Homography; Real-time processing |
| Abstract |
There is a growing need for image stitching in the field of autonomous vehicles to ensure a wide field of view, situational awareness and object tracking. An image stitching algorithm consists of two parts: obtaining a homography based on feature points and matching the images through the mapping process. This paper proposes an efficient image stitching system to consider the case that the position of cameras are fixed such as in autonomous vehicles. The preprocessing part with role of calibration, implemented in a C language program, extracts the homography. The circuit accepts the extracted homography as inputs and performs the mapping process for two FHD images in real time. In addition, we propose two kinds of circuit considering the accuracy of image stitching and the area-performance characteristics of the implemented circuit. The first one performs the mapping process based on the homography, exhibiting higher accuracy of image stitching. The second one performs the mapping process based on the affine obtained by simplifying the homography, showing higher speed with smaller area. Synthesised using a 65nm standard cell library, the proposed mapping circuits based on the homography and affine show the throughputs of 0.142 GPPS with 130,993 gates and 0.5 GPPS with 39,091 gates, respectively, which meets the target performance of 0.12 GPPS required for real-time processing of FHD images. |