| Title |
Implementation of Time-interleaved Non-binary Noise-shaping SAR ADCs |
| DOI |
https://doi.org/10.5573/ieie.2025.62.12.58 |
| Keywords |
Analog-to-digitalconverter; Time-interleaved architecture; Noise-shaping SAR ADC |
| Abstract |
This paper discusses the optimization of speed and resolution in a time-interleaved (TI) noise-shaping (NS) successive approximation register (SAR) analog-to-digital converter (ADC). In particular, it presents performance verification results for optimizing the overall resolution and operating speed of the ADC by varying the gain in the integration stage within a non-binary architecture. |