Ramkaj A. T., Strackx M., Steyaert M. S. J., Tavernier F., 2018, A 1.25-GS/s 7-b SAR
ADC With 36.4-dB SNDR at 5 GHz Using Switch-Bootstrapping, USPC DAC and Triple-Tail
Comparator in 28-nm CMOS, IEEE J. Solid-State Circuits, Vol. 53, No. 7, pp. 1889-1901