KIEE - The Transactions of the Korean Institute of Electrical Engineers

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The Transactions of the Korean Institute of Electrical Engineers

The Transactions of the Korean Institute of Electrical Engineers

ISO Journal TitleTrans. Korean. Inst. Elect. Eng.

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Title	Development of Impedance Locus Model for Protective Relay Dynamic Test
Authors	김수남(Kim, Su-Nam) ; 이재규(Lee, Jae-Gyu) ; 이명수(Lee, Myeong-Su) ; 유석구(Yu, Seok-Gu)
Page	pp.451-459
ISSN	1975-8359
Keywords	Real Time Digital Simulator (RTDS) ; Protective Relay Dynamic Test ; Out of Step Tripping ; Power Swing Blocking ; Apparent Impedance Locus ; Power System Stability
Abstract	This paper presents a method for modelling of the impedance locus in order to test the protective relay with dynamic. This paper has the two parts, the first part is the configuration of impedance locus with voltage magnitude, total impedance magnitude and angle. And the second part is the control of the locus speed with deviation of two frequencies. The proposed method is applied to two machine equivalent system with PSCAD/EMTDC to show its effectiveness.

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