| Title |
Design of Learning Module for ERNIE(ERNIE : Expansible & Reconfigurable Neuro Informatics Engine) |
| Authors |
정제교(Jung Je Kyo) ; 위재우(Wee Jae Woo) ; 동성수(Dong Sung Soo) ; 이종호(Lee Chong Ho) |
| Keywords |
Neural Network ; Learning Module ; FPGA ; Verilog HDL |
| Abstract |
There are two important things for the general purpose neural network processor. The first is a capability to build various structures of neural network, and the second is to be able to support suitable learning method for that neural network. Some way to process various learning algorithms is required for on-chip learning, because the more neural network types are to be handled, the more learning methods need to be built into. In this paper, an improved hardware structure is proposed to compute various kinds of learning algorithms flexibly. The hardware structure is based on the existing modular neural network structure. It doesn't need to add a new circuit or a new program for the learning process. It is shown that rearrangements of the existing processing elements can produce several neural network learning modules. The performance and utilization of this module are analyzed by comparing with other neural network chips. |