| Title |
Design of the High Throughput Pipeline LEA |
| Authors |
이철(Lee, Chul) ; 박능수(Park, Neungsoo) |
| DOI |
https://doi.org/10.5370/KIEE.2015.64.10.1460 |
| Keywords |
Lightweight encryption algorithm(LEA) ; Block cipher algorithm ; FPGA ; Encryption hardware |
| Abstract |
As the number of IoT service increases, the interest of lightweight block cipher algorithm, which consists of simple operations with low-power and high speed, is growing. LEA(Leightweight Encryption Algorithm) is recently adopted as one of lightweight encryption standards in Korea. In this paper a pipeline LEA architecture is proposed to process large amounts of data with high throughput. The proposed pipeline LEA can communicate with external modules in the 32-bit I/O interface. It consists of input, output and encryption pipeline stages which take 4 cycles using a muti-cycle pipeline technique. The experimental results showed that the proposed pipeline LEA achieved more than 7.5 Gbps even though the key length was varied. Compared with the previous high speed LEA in accordance with key length of 128, 192, and 256 bits, the throughput of the pipeline LEA was improved 6.45, 7.52, and 8.6 times. Also the throughput per area was improved 2, 1.82, and 2.1 times better than the previous one. |