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Mobile QR Code QR CODE : The Transactions of the Korean Institute of Electrical Engineers
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Title Parallel String Matching and Optimization Using OpenCL on FPGA
Authors 윤진명(Yoon, Jin Myung) ; 최강일(Choi, Kang-Il) ; 김현진(Kim, Hyun Jin)
DOI https://doi.org/10.5370/KIEE.2017.66.1.100
Page pp.100-106
ISSN 1975-8359
Keywords GPU ; PFAC ; Parallel computing ; String matching ; OpenCL ; Memory hierarchy
Abstract In this paper, we propose a parallel optimization method of Aho-Corasick (AC) algorithm and Parallel Failureless Aho-Corasick (PFAC) algorithm using Open Computing Language (OpenCL) on Field Programmable Gate Array (FPGA). The low throughput of string matching engine causes the performance degradation of network process. Recently, many researchers have studied the string matching engine using parallel computing. FPGA's vendors offer a parallel computing platform using OpenCL. In this paper, we apply the AC and PFAC algorithm on DE1-SoC board with Cyclone V FPGA, where the optimization that considers FPGA architecture is performed. Experiments are performed considering global id, local id, local memory, and loop unrolling optimizations using PFAC algorithm. The performance improvement using loop unrolling is 129 times greater than AC algorithm that not adopt loop unrolling. The performance improvements using loop unrolling are 1.1, 0.2, and 1.5 times greater than those using global id, local id, and local memory optimizations mentioned above.