| Title |
Low Power SAR ADC with Series Capacitor DAC |
| Authors |
이정현(Jeong-Hyeon Lee) ; 진유린(Yu-Rin Jin) ; 조성익(Seong-Ik Cho) |
| DOI |
http://doi.org/10.5370/KIEE.2019.68.1.90 |
| Keywords |
Successive approximation ADC ; Charge redistribution DAC ; Capacitor type DAC ; Low power DAC |
| Abstract |
The charge redistribution digital-to-analog converter(CR-DAC) is often used for successive approximation register analog-to-digital converter(SAR ADC) that requiring low power consumption and small circuit area. However, CR-DAC is required 2 to the power of N unit capacitors to generate reference voltage for successive approximation of the N-bit SAR ADC, and many unit capacitors occupy large circuit area and consume more power. In order to improve this problem, this paper proposes SAR ADC using series capacitor DAC. The series capacitor DAC is required 2(1+N) unit capacitors to generate reference voltage for successive approximation and charges only two capacitors of the reference generation block. Because of these structural characteristics, the SAR ADC using series capacitor DAC can reduce the power consumption and circuit area. Proposed SAR ADC was designed in CMOS 180nm process, and at 1.8V supply voltage and 500kS/s sampling rate, proposed 6-bit SAR ADC have signal-to-noise and distortion ratio(SNDR) of 36.49dB, effective number of bits(ENOB) of 5.77-bit, power consumption of 294uW. |