| Title |
Development of CMOS Sigma-Delta DAC Chip for Using ADSL Modem |
| Authors |
방준호(Bang, Jun-Ho) ; 김선홍(Kim, Sun-Hong) |
| Keywords |
{\Sigma}-{\Delta} DAC ; ADSL analog front-end block ; 1st-order Switched-Capacitor filter ; Active 2nd-order Resistor-Capacitor filter |
| Abstract |
In this paper, the low voltage 3V Sigma-Delta Digital Analog Converter(DAC) is designed for using in the transmitter of ADSL analog front-end. We have developed the CMOS DAC according to ANSI T1.413-2(DMT) standard specifications of the chip. The designed 4th-order DAC is composed of three block which are 1-bit DAC, 1st-order Switched-Capacitor filter and analog active 2nd-order Resistor-Capacitor(RC) filter. The HSPICE simulation of the designed DAC showing 65db SNR, is connected with 1.1MHz continuous lowpass filter. And also, we have performed the circuits verification and layout verification(ERC, DRC, LVS) followed by fabrication using TSMC 2-poly 5-metal p-substrate CMOS 0.35μm processing parameter. Finally, the chip testing has been performed and presented in the results. |