문운철
(Un-Chul Moon)
1iD
박혜진
(Hye-Jin Park)
1iD
성정원
(Jung-Won Sung)
1iD
곽상신
(Sang-Shin Kwak)
†iD
-
(School of Electrical and Electronic Engineering, Chung-Ang University, Korea)
Copyright © The Korea Institute for Structural Maintenance and Inspection
Key words
Capacitor Monitoring, Electrolytic Capacitors, Least Mean Square (LMS)
1. Introduction
An electrolytic capacitor is an essential element of a power electronic system and
is a device having many advantages. Due to its structural characteristics, it can
have a large capacitance compared to a small volume and can be manufactured at a relatively
low price. For this reason, electrolytic capacitor is often used in power conversion
systems. Electrolytic capacitors inside the system are subject to voltage and current
ripple during system operation, increasing the internal temperature. When temperature
rises, the electrolyte inside the capacitor evaporates and leaks. This is one of the
main aging mechanisms of capacitors [1]. As capacitors are continuously maintained in these environments, current ripple
and power dissipation lead to changes in capacitance and equivalent series resistance
(ESR) increase. This degrades the performance of the system, causes failure, and it
lowers the trust of the whole system. To increase the system reliability, it should
monitor the capacitor's state. Capacitor monitoring can diagnose through internal
capacitance and internal resistance ESR. As aging progresses, capacitance decreases
and ESR increases, and the time of failure can be determined through the ratio. When
the capacitance decreases by more than 20% and the ESR increases by 2 to 3 times,
it can be said to be a failure [2,3]. Among them, the change in ESR has a more prominent feature than the change in capacitance.
In addition, the volume of the electrolyte changes with aging, and the rate of change
is directly related to the rate of change in ESR. Therefore, ESR is considered more
reliable than capacitance as an indicator for monitoring the condition of electrolytic
capacitors [4,5].
According to the aforementioned results, many techniques for monitoring the state
of DC Link electrolytic capacitors through ESR estimation have been proposed [22-24]. Methods for estimating parameters can be roughly divided into three types [6]. These are a small-signal ripple-based scheme with a period, a large-signal-based
scheme without a period, and a data-based scheme, as shown in Fig 1. First, the small-signal ripple-based technique with a period uses the capacitor
data ripple component. There are several methodologies for this technique. An example
of this is to measure the ripple signal using a voltage sensor and a current sensor,
and to estimate the ESR in an intermediate frequency band or a frequency domain such
as a switching frequency [7-12]. There is discrete Fourier transform (DFT) and least mean square (LMS) technique
for estimating using current and voltage [13]. ESR is derived from relationship between average power loss and capacitor current
[14-16]. ESR can also be derived through internal ripple change by injecting an external
signal [17]. Second, the large-signal-based technique that does not have a period utilizes the
voltage charged and discharged in the capacitor. The capacitor is discharged in the
circuit through the operation of the switch, and its characteristics are substituted
into the discharge equation to calculate [18,19]. The two techniques mentioned above estimate ESR using the equivalent circuit of
a capacitor. However, the data-based method is sometimes called a black box model
because it does not utilize capacitor equivalent circuits and circuit models. The
state of the capacitor is modeled through a large amount of data training and testing.
ESR is estimated using signal data such as input/output voltage and current during
operation [20,21]. This technique has the advantage of being simple because it does not require a modeling
process but has the disadvantage that it requires a large amount of data.
Fig. 1. Model based method (a) Small signal ripple-based method (b) Large signal based
method (c) Data based method
In this paper, ESR is estimated using a small-signal ripple-based technique with a
period. The formula expressing the capacitor equivalent circuit model through capacitor
voltage and current is applied to the least mean square technique. ESR can be derived
by calculating an unknown parameter matrix. This algorithm was implemented in MATLAB,
and data were collected through experiments. This technique does not require a large
amount of data, and complex processes such as signal injection do not exist. In addition,
unlike many results of frequency analysis, since data in the time domain is directly
used, a conversion process into the frequency domain is not required. As shown in
other studies through formula derivation, it has the advantage of being applicable
to all types of topologies, unlike techniques limited to a specific topology. First,
capacitor data are collected through DC/AC single-phase converter experiment to collect
data to be applied to least mean square technique. Data is collected under the conditions
of three capacitor capacities, and ESR is estimated. In addition, in order to consider
the effect of noise and shape of the data, the condition with the highest estimation
accuracy was found using data with sampling times of 12 $\mu s$, and 40 $\mu s$. Afterwards,
the estimation error according to the length and the section of the data was compared.
The following is a brief outline of this paper. First, Chapter 1 is an introduction.
Chapter 2 describes a method for estimating the ESR of a capacitor based on the least
mean square technique. Chapter 3 shows the data collection process through experiments.
Chapter 4 describes the results of ESR estimation using LMS. Finally, Chapter 5 summarizes
the conclusions of the study.
2. Estimation of capacitor internal resistance based on least mean square (LMS)
technique
In this study, ESR, the internal resistance of a capacitor, is estimated by the LMS
method. This technique is a parameter identification technique, which estimates parameters
in an unknown parameter using known signal. That is, the ESR of the capacitor, which
is an unknown internal parameter, is estimated through measurable capacitor voltage
and current data. The internal resistance value at which the error is minimized is
estimated through the error function consisting of the measured value and the calculated
value. First, it is assumed that there is a model expressed in the form of Equation
(1).
In Equation (1), $Y$ and $\Phi$ are already known measured data, and $\theta$ is an unknown parameter.
The loss function for this expression can be expressed as Equation (3).
Using the principle that the point where the slope of the loss function is 0 as shown
in Equation (4) is the minimum value of the loss function, $\theta$ can be calculated when $\Phi^{T}\Phi$
is nonsingular.
Based on this technique, the ESR inside of the model is estimated by measuring voltage
and current applied to the DC-Link stage. A capacitor’s equivalent model is expressed
as an internal resistor and an internal capacitor in series like Fig 2. Therefore, as expressed in Equation (6), the voltage across the capacitor terminal is expressed as the sum of $V_{Ca p}$,
which is the voltage across the internal capacitor, and $V_{ESR}$, which is the voltage
across the internal resistor. Using this model structure, an estimation algorithm
based on least mean square was derived.
If the voltage across the capacitor is expressed using current, it can be expressed
as Equation (6). By arranging the equation, it can be arranged in a discrete form with a sampling
step as shown in Equation (9).
$\theta_{1}=ESR,\: \theta_{2}=\dfrac{1}{C},\: \theta_{3}=Cons\tan t variab\le$
where $\theta_{3}$ is added to consider a possible constant component in the measured
data.
It is expressed the difference between previous and current according to the sampling
step, and this measurement is performed at every sampling step. These measured data
for nth sampling time are accumulated, which can be expressed as a form of a matrix
equation in (13).
The matrix of Equation (13) can be expressed according to the structure of Equation (1). The sizes of the $Y$, $\Phi$, $\overline{\theta}$ matrices are $(N-1)\times 1$,
$(N-1)\times 3$, $3\times 1$, respectively.
According to Equation (5), the parameters of the $\overline{\theta}$ matrix can be calculated through $Y$ and
$\Phi$, which are information that can be known through measurement. In conclusion,
ESR can be estimated as Equation (17).
3. Data collection through experiments
Fig. 2. DC/AC converter and input capacitor equivalent circuit
Table 1 Measured values of capacitors used in the experiment
|
Rated C
|
Measured C
|
Measured ESR
|
|
$122 {\mu F} $(Sample 1)
|
$106 {\mu F} $
|
490$m {\Omega} $
|
|
$386 {\mu F} $(Sample 2)
|
$330 {\mu F} $
|
155$m {\Omega} $
|
|
$650 {\mu F} $(Sample 3)
|
$553 {\mu F} $
|
103$m {\Omega} $
|
Fig. 3. DC/AC single-phase converter waveform (a) load voltage (b) load current
Experiments were conducted in DC/AC single-phase converter topology estimating a capacitor's
internal resistance using a parameter identification algorithm. As shown in Fig 2, the equivalent circuit of a capacitor can be expressed by internal capacitance (C)
and internal resistance (ESR). Therefore, capacitor data were collected to estimate
ESR. Converter’s DC voltage is 100 $V$, it is configured to have a resistance of 10
$\omega$ and an inductor of 10 $m H$ as a single-phase load. In addition, it was controlled
by a Sinusoidal PWM (SPWM) method with 5 $k Hz$ switching frequency by DSP (TMS320F28335).
Input capacitor C was set to have three capacitances by connecting one 100 $\mu F$
and several 22 $\mu F$ in parallel. Table 1 shows measured capacitance and ESR values of the three capacitors used for estimation.
Data varying according to the three capacitances were collected and used for ESR estimation.
Fig 3 and 4 are the waveforms of the converter and voltage, current collected when the
internal capacitance and ESR is 330 $\mu F$ and 155 $m\omega$.
Fig. 4. (a) Capacitor voltage (b) Capacitor current of ESR 155 $m\omega$
4. ESR estimation result
ESR was estimated based on capacitor data, and the error was confirmed. There are
three types of capacitors used for estimation: 122 $\mu F$, 386 $\mu F$ and 650 $\mu
F$. Each capacitor is named samples 1, 2 and 3. And each ESR was measured using an
LCR meter (E4980A) in the 5 $k Hz$ frequency, which is the characteristic area of
ESR.
First, there is a difference between the current and voltage ripple magnitude according
to ESR, the shape of the waveform changes accordingly. The error trend was analyzed
by substituting known measured capacitance and ESR values and collected data into
Equation (11). Fig 5 is a waveform showing the difference between the values of the left and right terms
of Equation (11). And here, the difference between the two sides of Equation (11) is called the model error. Looking at the results of Fig 5, the model error magnitudes of 103 $m\omega$ and 155 $m\omega$ seem to be between
+0.2 V and -0.2 V. In the case of 490 $m\omega$, it shows between +0.5 V and -0.5
V. Therefore, in all cases, it is judged that there is a relatively small error, and
it is predicted that estimation through capacitor voltage and current data is possible.
Afterwards, it was checked whether the same results as predicted were obtained through
ESR estimation. In addition, in order to consider the effect of noise included in
the data, the sampling time was adjusted to determine the estimation possibility.
The total data was collected for 4 seconds, and the sampling times were 12 $\mu s$,
and 40 $\mu s$, comparing the three conditions.
Fig. 5. Model error analysis according to ESR (a) 103 $m\omega$ (b) 155 $m\omega$
(c) 490 $m\omega$
Table 2 ESR Estimation with Sampling Time
|
Sampling Time
|
Measured ESR by LCR meter
|
|
103 $m {\Omega} $(Sample3)
|
155 $m {\Omega} $(Sample2)
|
490 $m {\Omega} $(Sample1)
|
|
12${\mu s}$
|
94.43$m {\Omega} $
|
155.43$m {\Omega} $
|
493.56$m {\Omega} $
|
|
40${\mu s}$
|
97.69$m {\Omega} $
|
176.80$m {\Omega} $
|
536.07$m {\Omega} $
|
Table 3 Average error according to sampling time
|
Sampling Time
|
Average error
|
|
12${\mu s}$
|
3.11 %
|
|
40${\mu s}$
|
9.54 %
|
In Table 2, the average of the estimation errors in 3 types of samples is calculated. Therefore,
Table 3 shows the estimated average errors at 12 $\mu s$, and 40 $\mu s$, respectively. As
a result, the lowest error was shown at 12 $\mu s$. On the other hand, in the case
of 40 $\mu s$, it was confirmed that the data required for estimation was lost because
the data collection interval was too wide. Therefore, it was confirmed that 12 $\mu
s$ is an appropriate value for obtaining noise and information. Therefore, it was
confirmed that the highest estimation accuracy was achieved when the data sampling
time was 12 $\mu s$, so ESR was estimated using this data. Fig 6 shows ESR estimation over time when the sampling time is 12 $\mu s$. After about
ms, convergence to the estimated value was confirmed. Due to the characteristics of
the data, the effect of noise may be different depending on the section. Here, "section"
is data of a specific length randomly extracted from the entire 4 seconds. For example,
A in Fig 7 consists of data from 1 to 1000. At this time, the number means that the beginning
of the data of 4 seconds is 1, and the names are named in order. Therefore, an optimal
section with less noise was found, and ESR estimation was performed. In a total of
4 seconds, the length or section of the data was randomly selected, and the error
was compared. Comparing the previous cases, it was confirmed that the data estimation
result of 155 $m\omega$ was relatively accurate. Therefore, in the case of 155 $m\omega$,
the estimation results according to the data section and length were examined. The
result is shown in Fig 7. The x-axis represents the data length and section of five types, and the y-axis
represents ESR. Since we used data of 155 $m\omega$, the closer to 155 $m\omega$ indicated
by the blue line, the more accurate the estimate. In this case, the data number means
the order when all data are arranged in a line.
Fig. 6. ESR estimation at 12 $\mu s$ sampling time (a) 103 $m\omega$ (b) 155 $m\omega$
(c) 490 $m\omega$
As a result, it was confirmed that the estimation results according to the data section
were similar at a minimum of 0.07 % and a maximum of 2.31 %. Because the data is repeated
at regular intervals, the length does not increase the amount of information. Also,
when Tables 3 and 4 are compared, the error in Table 3 is relatively large. It can be seen that the effect of the data sampling time is
greater than the effect of the length and section of data on performance. Therefore,
if the capacitor data having 12 $\mu s$ sampling time are applied to the least mean
square, the ESR estimated with about 98 % accuracy.
Fig. 7. Estimate 155 $m\omega$ according to data interval and length
Table 4 155 $m\omega$ estimation error according to data interval and length
|
|
A
|
B
|
C
|
D
|
E
|
|
Error
|
1.23 %
|
0.07 %
|
2.09 %
|
1.92 %
|
2.31 %
|
5. Conclusion
In this paper, the input capacitor ESR of converter is estimated by the least mean
square method. The structure of the capacitor was modeled by utilizing the characteristic
that it can be expressed as a series circuit of an internal capacitor and ESR. In
addition, unknown parameter values can be calculated through derivation of the loss
function that becomes the minimum. It is calculated for each sampling step and proceeds
in the direction of reducing the error. The voltage, current across the capacitor
were to be used in the least mean square technique collected through experiments.
First, the applicability of the least mean square method was identified using the
collected data. As a result, it was confirmed that it was relatively accurate at a
sampling time of 12 $\mu s$. After that, the accuracy according to the section and
length of the data was compared. As a result, it was confirmed that the accuracy was
similar regardless of the section and length. Therefore, when the Least Mean Square
is applied to the capacitor estimation technique, the effect of the sampling time
on the estimation performance is greater than that of the length/section. The algorithm
studied in this paper has the advantage of being able to select a sampling time suitable
for the data to be used. Section has less influence on estimation accuracy than sampling
time. Therefore, it is possible to secure the most accurate accuracy by selecting
an appropriate sampling time and section. In addition, there is an advantage in that
only the capacitor voltage current can be measured and applied to the estimation while
applying the Least Mean Square to the ESR estimation. However, it is necessary to
check which sampling time and section have the highest accuracy considering the noise
of the data. This is the difference from other research subjects.
Acknowledgements
본 논문은 정부(과학기술정보통신부)의 재원으로 한국연구재단 (No. 2020R1A2C1013413) 및 2022년도 중앙대학교 연구년 결과물 및 2023년도
정부(산업통상자원부)의 재원으로 한국산업기술진흥원 (P0012453, 2023년 산업혁신인재성장지원사업)의 지원을 받아 수행된 연구로서, 관계부처에
감사드립니다.
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저자소개
Un-Chul Moon received his B.S., M.S. and Ph.D. degrees from Seoul National University,
Korea, in 1991, 1993 and 1996, respectively, all in Electrical Engineering. From 2000,
he was with the Woo-Seok University, Korea, and from 2002 with the Chung-Ang University,
Korea, where he is currently a Professor of Electrical Engineering. His current research
interests are in the areas of power system analysis, computational intelligence and
automation.
Hye-Jin Park received her B.S. and M.S. degrees in Electrical and Electronics Engineering
from Chung-Ang University, Seoul, Korea, in 2021 and 2023. Since 2023, she has been
working in Samsung Electronics, Korea.
Jung-Won Sung received her B.S. degree in Electrical and Electronics Engineering from
Chung-Ang University, Seoul, Korea, in 2023. She is currently pursuing the M.S. degree
in Electrical and Electronics Engineering with Chung-Ang University, Seoul, Korea.
Her current research interest is estimating parameters in converters.
Sang-Shin Kwak received his Ph.D. degree in Electrical Engineering from Texas A&M
University, College Station, TX, USA, in 2005. From 2007 to 2010, he was an Assistant
Professor at Daegu University, Gyeongsan, Korea. Since 2010, he has been working
at Chung-Ang University, Seoul, Korea, where he is presently a Professor. His current
research interests include the design, modeling, control, and analysis of power
converters for electric vehicles and renewable energy systems as well as the prognosis
and fault tolerant control of power electronics systems.