| Title |
Capacitance Value Analysis of Sub-module Test Circuit for MMC-based HVDC System |
| Authors |
Byuong-Jun Seo ; Kwon-Sik Park ; Kwang-Rae Jo ; Eui-Cheol Nho ; Heung-Geun Kim ; Tae-Won Chun ; Tae-Jin Kim ; Jong-Pil Lee |
| DOI |
https://doi.org/10.6113/TKPE/2018.23.6.433 |
| Keywords |
Modular multi-level converter ; Sub-module test ; HVDC |
| Abstract |
This study considers the design of a submodule test circuit for the modular multi-level converter (MMC)-based HVDC systems. A novel submodule test circuit is proposed to provide not only an AC but also a DC component to the submodule current. However, the current waveforms depend on the capacitor voltages. Therefore, determining the capacitance value of the test circuit is important. Finding a proper capacitance value is easy when the proposed analysis method is used. Simulation and experimental results show the usefulness of the proposed method. |