| Title |
A Gate Driver Circuit for Gallium-Nitride HEMT with Over-Current and Over-Voltage Protection |
| Authors |
Jong-Hun Kim ; Seogyong Jeong ; Myeong-Ho Kim ; Min-Sik Kim ; Dong-Chan Lee ; Mingyu Jeong ; Se-Un Shin |
| DOI |
https://doi.org/10.6113/TKPE.2025.30.4.307 |
| Keywords |
GaN HEMT; Wide bandgap devices; Gate drivers; Protection circuits; Layout optimization |
| Abstract |
This paper presents a high-speed gate driver circuit specifically designed for gallium-nitride (GaN) power semiconductors, integrating over-current protection (OCP) and over-voltage protection (OVP). While GaN devices offer superior switching performance and power density compared to silicon-based devices, their reliability is limited by their inherent susceptibility to short-circuit and gate overstress conditions during high-speed operation. To address these issues, a gate driver architecture is proposed that incorporates a low-latency desaturation-based OCP and a multi-level soft turn-off OVP, both optimized to minimize parasitic effects through PCB layout refinement. Experimental validation using a 13.56 MHz PWM signal confirms the stable and reliable operation of the proposed protection circuits, which achieve a total response time of 120 ns. Furthermore, the soft turn-off topology successfully reduces negative gate voltage peaks by 45% compared to hard turn-off-only protection, significantly enhancing the robustness of the GaN gate channel. This work presents a scalable and reliable gate driver solution for next-generation GaN-based power systems, applicable in various fields, including electric vehicle chargers, 5G communication, and renewable energy systems. |