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Title High-PSRR Low-dropout Regulator with Fast Transient Response Time and Low Output Peak Voltage
Authors (Nahyun Kim) ; (Junyoung Song)
DOI https://doi.org/10.5573/JSTS.2021.21.4.292
Page pp.292-296
ISSN 1598-1657
Keywords Low-dropout (LDO) regulator; power-supply rejection ratio (PSRR); fast transient response time; low output peak voltage
Abstract This study proposes the feed-forward ripple cancellation (FFRC) technique to low drop-out (LDO) regulator. By adding load tracking impedance to the gate of pass transistor, it is possible to secure stability with a 100-nF capacitor having low ESR and be obtained less than 35 ns response time. In all frequency bands, a power supply rejection ratio (PSRR) less than -70 dB is obtained when the load current is 10 mA. The circuit is implemented in 65-nm CMOS process.