| Title |
A Concurrent Dual-band CMOS Partial Feedback LNA with Noise and Input Impedance Matching Optimization for Advanced WLAN Applications |
| Authors |
(Dong-Myeong Kim) ; (Euibong Yang) ; (Donggu Im) |
| DOI |
https://doi.org/10.5573/JSTS.2021.21.5.356 |
| Keywords |
CMOS; complementary source follower; concurrent; dual-band; feedback; minimum noise figure; noise figure; noise matching; optimum noise impedance; WLAN |
| Abstract |
A concurrent dual-band CMOS partial feedback LNA optimizing noise and input reflection coefficient (S11) at both 2.4 and 5.2 GHz frequency bands is designed using a 65-nm CMOS process for advanced WLAN applications. The inverter-based input transconductance stage directly drives two parallel cascode transistors with 2.4 and 5.2 GHz LC loads, and the output signals splitting into two resonators are combined through a complementary source follower (CSF). Based on an analytical study on the optimum noise impedance (Zopt) and minimum noise figure (NFmin) of the proposed concurrent LNA circuit topology, the concurrent dual-band input matching network is designed in order to achieve low noise figure (NF) around NFmin at both operating frequencies. By employing a partial resistive feedback between 2.4 GHz LC resonator and input transconductance stage through a CSF, an imperfect S11 of the proposed LNA at 2.4 GHz is improved at the expense of a slight increase of NF. In the simulation, the designed LNA achieved forward gain (S21) of 14 and 15.5 dB, NF of 1.6 and 2.2 dB, and S11 of -11.2 and -10.3 dB at 2.4 and 5.2 GHz, respectively. The power consumption of the designed LNA is 7.7 mW from a 1.2 V supply voltage. |