| Title |
Design of a Packaged Multi-radius Multi-path Solenoidal Inductor for Redistribution Layers |
| Authors |
(GiWon Kim) ; (SoYoung Kim) |
| DOI |
https://doi.org/10.5573/JSTS.2022.22.6.395 |
| Keywords |
Integrated voltage regulator (IVR); redistribution layer (RDL); fan-out wafer level package (FOWLP); 3-D solenoid inductor; quality factor |
| Abstract |
This paper proposes a three-dimensional solenoidal inductor using a “multi-radius multi-path” (MRMP) structure that targets integrated voltage regulators (IVRs). Multi-radius (MR) refers to the inclusion of additional turns inside the solenoid, and multi-path (MP) describes the division of a single metal into two paths to reduce non-uniformity in currents due to differences in length. Using an MRMP structure, we propose two new inductor designs for fan-out wafer-level packaging. A two-layer MRMP approach that implements the multi-path in an additional layer, and a one-layer MRMP configuration avoids the need for an additional layer by incorporating the multi-path in an inner turn. We compare inductance and quality performance according to the frequency of the two designs. When the MR technique is applied, the inductance increases due to the increase in the length of the inductor, but resistance also increases. As the frequency increases, alternating current (AC) resistance becomes dominant. The MP increases the quality factor by alleviating skin and proximity effects, which are the main causes of increased AC resistance. Analytical modeling is carried to rapidly estimate and optimize direct current inductance using partial inductance. To verify the improvement in efficiency due to the proposed inductor structure, we propose a prototype IVR that includes inductor loss and investigate the efficiency with circuit simulations using an IVR design with a conversion ratio of 3.6 V:1.8 V operating at 10 MHz. By using the two-layer MRMP inductor, the prototype IVR efficiency increases from 72.6% to 82.1%. A one-layer MRMP inductor, an IVR design with conversion ratio of 1.8 V:1.0 V and an operating frequency of 40 MHz, increases the maximum efficiency from 56.6% to 75.1%. |