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Title Automated Matching Placement Generation in Analog Circuits
Authors (Yanning Chen) ; (Dongyan Zhao) ; (Fang Liu) ; (Yang Zhao) ; (Zhen Fu) ; (Yali Shao) ; (Dong Zhang) ; (Yucheng Pan) ; (Xiangyu Meng)
DOI https://doi.org/10.5573/JSTS.2025.25.1.71
Page pp.71-81
ISSN 1598-1657
Keywords Analog circuit; matching device; optimization; placement; EDA; MOSFETs.
Abstract The layout of matching devices is crucial in analog circuit design as it impacts matching, parasitic effects, and performance. Common-centroid layout, a popular method, minimizes mismatches but designing an efficient algorithm is challenging. This paper introduces a comprehensive automated matching placement algorithm for analog circuits, optimizing both common-centroid requirements and device positions to enhance accuracy and minimize area. Under the premise of minimizing performance degradation, we implemented a fully automated process from netlist to final design, demonstrating effective matching placement for transistor arrays in differential pairs and current mirrors, significantly reducing layout area and parasitic effects.