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  1. (Dept. of Electrical Engineering, Chosun Univerity, Korea)



Transformer, Fault current, Circuit breaker, DC Circuit breaker, Superconductor, Quench

1. Introduction

High-voltage DC (HVDC) converts high-voltage AC power to DC for power transmission and then converts it back to AC on the customer side. HVDC has low power loss for long-distance power transmission and its connection to a grid is easy because it is not affected by frequency. Moreover, if the power transmission distance is longer than approximately 600 km, it is economically less costly than HVAC considering the line cost, terminal cost, and losses [1]. For this reason, many research institutes and companies worldwide have conducted research on HVDC [2]. To apply a HVDC system to a grid, a fault current of several kA must be cut off within a few ms, and circuit breaker technologies with high operation reliability and stability are required. DC, however, does not have a current zero point unlike AC, and it is difficult to implement technology for eliminating high arc energy. The DC circuit breakers developed by a number of companies, such as GE, SIMENSE, and ABB, exhibited high losses when the cut-off time was fast and slower cut-off time when the loss value was reduced. Moreover, they were only focused on performance, thereby reducing the economic effectiveness of the circuit breaker technologies.

In this study, a transformer-superconducting combined circuit breaker (T-SCCB) that combines a superconducting combined circuit breaker (SCCB) with a transformer was proposed for the stable blocking of the DC fault current[3-4]. Two types of circuit breakers were compared considering various aspects including the blocking performance, current limiting rate, and damage to the superconductor. System analysis was conducted using the EMTDC/PSCAD simulation software.

2. Blocking Theory and Mechanism according to the Fault Current Limiter Type

2.1 SCCB theory and mechanism

그림. 1. 한류부 타입에 따른 회로도

Fig. 1. Circuit diagram according to current-limit type

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In the normal state, the superconductor maintains zero- resistance at cryogenic temperatures, allowing current to flow without loss. In the case of a fault in the system, however, the fault current exceeds the critical current of the superconductor, and the superconductor is quenched. This puts the superconductor in a normal-conducting state and generates impedance, thereby limiting the fault current. Equation (1) shows the phase transition of the superconductor [5]. The fault current limited by the superconductor is blocked by the mechanical DC circuit breaker. When the mechanical circuit breaker of the main circuit performs the opening operation, the fault current is conducted to the commutation circuit. In this instance, oscillating current is generated in the main circuit by LC, and a current zero period is generated by the current. At the same time, the circuit breaker is completely opened. Blocking is then completed by discharging the residual current through surge arrest.

(1)
$R_{SC}(t)=\left\{\begin{aligned}0(t<t_{quen\chi ng})\\R_{m}\sqrt{1-\exp\left(-\dfrac{t}{T_{SC}}\right)}(t > t_{quen\chi ng})\end{aligned}\right\}$

$R_{sc}$ : Resistance of superconductor, $t$ : Time,

$R_{m}$ : Quench resistance of superconductor, $T_{SC}$ : Time constant of superconductor

2.2 T-SCCB theory and mechanism

In the normal state, current and counter electromotive force are not induced in the secondary coil because DC current is used. In the case of a fault, the magnitude of the current applied to the primary coil varies, thereby changing the magnetic flux. This induces a counter-electromotive force in the secondary coil, as shown in Equation (2). Moreover, the current is delayed due to the winding reactance. Therefore, the current is delayed first by the coils of the transformer when a counter-electromotive force is induced from the primary coil to the secondary coil. Owing to the same turn ratio, the magnitude of the current in the secondary coil is the same with that of the fault current in the primary coil. The current induced in the secondary coil is also delayed, and the superconductor is quenched when the fault current exceeds its threshold. The secondary current is then limited by the quenched superconductor. As the secondary current is limited, the primary current is also limited. The reactance that occurs when the primary current is limited is shown in equations (3) and (4). A counter-electromotive force is generated in the secondary coil to offset the magnetic flux in the primary coil, as shown in Equation (2). The limited fault current is then blocked in the same manner as SCCB.

(2)
$e=-L\dfrac{di}{dt}=-N\dfrac{d\Phi}{dt}$

(3)
$L=\dfrac{N_{1}\Phi_{1}}{dt}$

(4)
$X_{L}=2\pi f L[\Omega]$

2.3 Simulation Design

For the first time in South Korea, a construction project for VSC-HVDC between Wando and Jeju Island with the facility capacity of 150 kV and 200 MW is being planned. Therefore, a ground fault was simulated under the applied voltage of 150 kV and the fault occurrence of 0.1 sec, using the EMTDC/ PSCAD simulation software. The designed maximum magnitude of the fault current was 70 kA, and the line reactance was set to 0.1 mH. The maximum quench resistance of the superconductor was set to 5 Ω, and the time constant to reach the maximum quench resistance within 2 ms was 0.055. Moreover, the transformer was designed according to the applied voltage. The turn ratio was set to 1:1 for the same current magnitude in the primary and secondary coils. The leakage reactance was set to 0.001 pu for the ideal transformer model. For the design of the DC circuit breaker, Mayr Arc was used for the arc modeling, as shown in Equation (5) [6].

Mayr Arc is applicable when a small current occurs between the circuit breaker contacts at plasma temperatures below 8,000 K. Table 1 shows the parameters used in the design of the DC circuit breaker.

(5)
$\dfrac{1}{g}\dfrac{dg}{dt}=\dfrac{1}{\tau}\left(\dfrac{du_{{arc}}i_{m}}{P_{o}}-1\right)=-N\dfrac{d\Phi}{dt}$

$g$ : Arc conductance, $\tau$ : Arc time constance

$u_{{arc}}$ : Arc voltage, $P_{o}$ : Arc cooling power

표 1. 차단부 모델링 매개변수

Table 1. breaker modeling parameters

Classification

DC circuit breaker

L

0.2 mH

C

43.51 uF

Arc modeling

Mayr Arc type

Arc cooling power

5,000 kW

Arc time constant

0.3 usa

2.4 Simulation Analysis

Simulation analysis was conducted by designating SCCB and T-SCCB as A and B, respectively. Fig. 2 shows the current-limiting characteristic curves of A and B in the event of a fault. In the normal state, the normal current of 5 kA flowed in the line in a stable manner because the superconductor maintained the superconducting state with zero impedance. In the event of a fault, the fault current was directly conducted to the superconductor, and the maximum fault current was limited to 37.50 kA within 2 ms for A. For B, on the other hand, the current was delayed because it was applied to the superconductor through the primary and secondary coils of the transformer, and the fault current was limited within approximately 6 ms. In this case, the maximum fault current was found to be 24.20 kA.

그림. 2. 한류부 타입에 따른 고장 전류 특성

Fig. 2. Fault current limiting characteristics according to the current limiter type

../../Resources/kiee/KIEE.2019.68.12.1669/fig2.png

Fig. 3 shows the blocking characteristics of the circuit breakers according to the current limiter type. For A, the CB of the main circuit began the opening operation after the circuit breaker relay operation time. This blocking operation was supported by the commutation and absorption circuits, and the blocking operation was completed at 16.50 ms after the fault occurrence.

그림. 3. 한류부 타입에 따른 DC 회로 차단기의 차단 특성

Fig. 3. Blocking characteristics of DC circuit breakers according to the current limiter type

../../Resources/kiee/KIEE.2019.68.12.1669/fig3.png

For B, on the other hand, the operation of the circuit breaker was delayed first because of the limited current caused by the superconductor through the transformer. Moreover, the operation of the circuit breaker was completed 63.88 ms after the fault occurrence. This was approximately 3.87 times longer compared to A, indicating that blocking was delayed. After the operation of the superconductor due to the fault current, the circuit breaker performed the blocking operation. Fig. 4 shows the power burden on the superconductor.

그림. 4. 한류부 타입에 따른 초전도체의 전력 부담

Fig. 4. Power burden on the superconductor according to the current limiter type

../../Resources/kiee/KIEE.2019.68.12.1669/fig4.png

When a fault occurred, the power of the superconductor reached 5,124.26 MW within 2 ms due to the fault current for A. For B, on the other hand, the power reached 2,956.95 MW after approximately 6 ms. This is because a lower power burden was applied to the superconductor for B than for A. Therefore, the characteristics of the superconductor can be protected through the combination of a transformer even when the same capacity is used. Moreover, as the power can be integrated for A over time, the average power applied to the superconductor was expressed using Equation (6). The average power was 87.72 MWs for A and 42.36 MWs for B, showing that the average power of B was approximately 2 times lower than that of A. Fig. 5 shows the power burden on the circuit breakers. The circuit breaker power of A was 2,727.01 MW while that of B was 3,710.05 MW, confirming that B had an approximately 1.36 times higher power burden than A. The average power was 2.78 MWs for A and 12.96 MWs for B, showing that the average power of A was approximately 4.66 times lower than that of B.

As a result, it was confirmed that the combination of a transformer is effective in protecting the superconductor because it reduces the power applied to the superconductor and thus increases the power of the circuit breaker.

그림. 5. 한류부 타입에 따른 차단기의 전력 부담

Fig. 5. Power burden on the circuit breaker according to the current limiter type

../../Resources/kiee/KIEE.2019.68.12.1669/fig5.png

3. Conclusion

In this study, the characteristics of two current limiter types for the connection between the voltage source converter-high- voltage direct current (VSC-HVDC) system and the circuit breaker were compared and analyzed to derive a circuit breaker that is the most suitable for the VSC-HVDC system among the current-limiting DC circuit breakers.

The analysis results confirmed that the magnitude of the fault current was 13.30 kA lower for the transformer-superconducting combined circuit breaker (T-SCCB) than for the superconduct- ing combined circuit breaker (SCCB), and the burden on the superconductor was also reduced. The fault current limiting time was delayed by approximately 6 ms, however, and the completion of the opening operation by the circuit breaker was delayed by 6.6 ms. This indicates the possibility of the secondary accidents, such as a fire or explosion, if the blocking of the VSC-HVDC system is delayed.

Therefore, T-SCCB is considered suitable for use if further research will be conducted on increasing the capacity of the circuit breaker and decreasing the blocking time.

Acknowledgements

Following are results of a study on the “Leaders in INdustry-university Cooperation +” Project, supported by the Ministry of Education and National Research Foundation of Korea

References

1 
KERI (Korea Electrotechnology Research Institute), 2015, Development of high-speed DC circuit breakers for HVDC, pp. 166-171Google Search
2 
Xiang Zhiyuan Bin, Yingsan Geng Liu, 2015, DC Circuit Breaker Using Superconductor for Current Limiting, IEEE transactions on applied superconductivity, Vol. 25, No. 2, pp. 1-7DOI
3 
Hye-Won Choi, Hyo-Sang Choi, In-Sung Jeong, Jun-Beom Kim, June 2017, Characteristics analysis of superconductivity DC interrupting system in the Grid-Connected PV system with EMTDC/PSCAD, in 16th International Superconductive Electronics Conference (ISEC) 2017, Naples, ItalyDOI
4 
Seon-Ho Hwang, Hye-Won Choi, In-Sung Jeong, Hyo-Sang Choi, 2018, Characteristics of DC circuit breaker applying transformer-type superconducting fault current limiter, IEEE Transactions on Applied Superconductivity, Vol. 28, No. 4, pp. 5600605DOI
5 
Hee-Jin Lee, Gum-Tae Son, Jae-Ik Yoo, Jung-Wook Park, 2013, Effect of a SFCL on commutation failure in a HVDC system, IEEE transactions on applied superconductivity, Vol. 23, No. 3, pp. 5600104DOI
6 
J. B. Jung, H.S . Choi, 2016, Characteristics of the magnetic flux-offset type FCL by switching component, KIASC, Vol. 18, No. 2, pp. 18-20DOI

저자소개

구희석 (Hui-Seok Gu)
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2018 Graduated from Chosun University, Dept. of Mechatronics Engineering (Bachelor's degree).

2018 to present Master's course in Electrical Engineering

Tel : 062-230-7054

E-mail : huiseok93@naver.com

박상용 (Sang-Yong Park)
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2016 Graduated from Chosun University, Dept. of Electrical Engineering (Bachelor's degree).

2018 Graduated from the same University (master's degree)

2014 to present Doctor course in Electrical Engineering

Tel : 062-230-7054

E-mail : sangyong4400@gmail.com

최효상 (Hyo-Sang Choi)
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1989 Graduated from Chonbuk National University (Bachelor's degree).

1994 Graduated from the same University (master's degree).

2000년 Graduated from the same University (doctor's degree).

Present Professor, Dept. of Electrical Engineering, Chosun University

Tel : 062-230-7025

E-mail : hyosang@chosun.ac.kr