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References

1 
B. J. Baliga, “Power semiconductor device figure of merit for high-frequency applications,” IEEE Electron Device Lett., vol. 10, no. 10, pp. 455-457, 1989.DOI
2 
A. Lidow, “Is it the end of the road for silicon in power conversion?,” Proc. of IEEE, pp. 119-124, 2011.URL
3 
S. Dimitrijev, J. Han, D. Haasmann, H. Moghadam, and A. Aminbei-dokhti, “Power-switching applications beyond silicon: The status and future prospects of SiC and GaN devices,” Microelectronics Proc. - MIEL 2014 2014 29th Int. Conf. on, pp. 43-46, 2014.DOI
4 
B. Ozpineci, “Comparison of Wide-Bandgap Semiconductors for Power Electronics Applications,” United States. Department of Energy, 2004.URL
5 
D. W. Runton, B. Trabert, J. B. Shealy, and R. Vetury, “History of GaN: High-Power RF Gallium Nitride (GaN) from Infancy to Manufacturable Process and Beyond,” IEEE Microwave Magazine, vol. 14, no. 3, pp. 82-93, May 2013.DOI
6 
Hyun-Bin Kim, and Jong-Soo Kim, “Implementation of High-efficiency 1.5kW LDC for xEV using GaN HEMT,” The transactions of The Korean Institute of Electrical Engineers, vol. 69, no. 2, pp. 276-282, 2020.DOI
7 
Hun-Gyu Chae, Dong-Hee Kim, Min-Jung Kim, and Byoung Kuk Lee, “An Analysis for Gate-source Voltage of GaN HEMT Focused on Mutual Switch Effect in Half-Bridge Structure,” The transactions of The Korean Institute of Electrical Engineers, vol. 65, no. 10, pp. 1664-1671, 2016.DOI
8 
A. Boudjemai, R. Hocine, and S. Guerionne, “Space environment effect on earth observation satellite instruments,” 2015 7th International Conference on Recent Advances in Space Technologies (RAST), pp. 627-634, 2015.DOI
9 
Kwak, Hocheol, and Todd Hubing, "An overview of advanced electronic packaging technology," Clemson University Vehicular Electronics Lab, 2007.URL
10 
L. Mauri, G. Zafarana, E. Rizzi, and A. Corazza, “Evolution of Getter Technology in Electronic Hermetic Packaging,” 2023 24th European Microelectronics and Packaging Conference & Exhibition (EMPC), pp. 1-6, 2023.DOI
11 
V. S. Chippalkatti, R. C. Biradar, Y. Shivarudraswami, and N. Mathan, “High density packaging techniques for miniaturization of satellite RF and microwave subsystems: Attachments, Interconnections and Hermetic sealing,” IEEE 23rd Electronics Packaging Technology Conference (EPTC), pp. 357-362, 2021.DOI
12 
J. Park, M. Kang, H.-W. Jung, H.-K. Ahn, H. Kim and H. Lee, “Thermal-Hydraulic Performance Analysis of Manifold Microchannel Heat Sink for GaN HEMTs RF Devices,” KSME Spring and Autumn Conference, 2023.URL
13 
J. Tang, L. Li, G. Zhang, J. Zhang, and P. Liu, “Finite element modeling and analysis of ultrasonic bonding process of thick aluminum wires for power electronic packaging,” Microelectronics Reliability, 2022.DOI
14 
T. Dagdelen, E. Abdel-Rahman, and M. Yavuz, “Reliability criteria for thick bonding wire,” Materials, vol. 11, no. 4, 2018.DOI
15 
L. Chen, et al., “Thermal impact of randomly distributed solder voids on Rth-JC of MOSFETs,” 2008 2nd Electronics System-Integration Technology Conference, pp. 237-244, 2008.DOI
16 
A. S. Fleischer, L. Chang, and B. C. Johnson, “The effect of die attach voiding on the thermal resistance of chip level packages,” Microelectronics Reliability, vol. 46, no. 5-6, pp. 794-804, 2006.DOI
17 
M. A. Dudek, et al., “Three-dimensional (3D) visualization of reflow porosity and modeling of deformation in Pb-free solder joints,” Materials Characterization, vol. 61, no. 4, pp. 433-439, 2010.DOI
18 
B. Zhou, and Q. Baojun, “Effect of voids on the thermal fatigue reliability of PBGA solder joints through submodel technology,” 2008 10th Electronics Packaging Technology Conference, pp. 704-708, 2008.DOI
19 
H. Lu, C. Bailey, and C. Yin, “Design for reliability of power electronics modules,” Microelectronics Reliability, vol. 49, no. 9-11, 2009.DOI
20 
W. Liu, and N.-C. Lee, “The effects of additives to SnAgCu alloys on microstructure and drop impact reliability of solder joints,” Jom, vol. 59, no. 7, pp. 26-31, 2007.DOI
21 
P. Liang, H. Yan, W. Li, and D. Yang, “Void Eliminating Process of Sintered-Silver Die Attachment in Anaerobic-Sintering Atmospheres,” 2020 21st International Conference on Electronic Packaging Technology (ICEPT), pp. 1-4, 2020.DOI
22 
Electronic Industries Association, “Integrated Circuit Thermal Measurement Method – Electrical Test Method,” EIA/JEDEC Standard, JESD51-1, 1995.URL
23 
D. Schweitzer, “The junction-to-case thermal resistance: A boundary condition dependent thermal metric,” 2010 26th Annual IEEE Semiconductor Thermal Measurement and Management Symposium (SEMI-THERM), pp. 151-156, 2010.DOI