| Title |
A Study on the PLD Circuit Design of Pattern Generator |
| Authors |
Young-Dong Roh ; Joon-Seek Kim |
| Keywords |
pattern generator ; semiconductor device inspection ; functional inspection |
| Abstract |
Usually, according as accumulation degree of semi-conductor element increases, dynamic mistake test time increases sharply, and use of pattern generator is essential at manufacturing process to solve these problem. In this paper, we designed the PLD(Programmable Logic Device) circuit of pattern generator to examine dynamic mistake of semi-conductor element. Such all item got result that is worth verified action of return trip and function through simulation, and satisfy. |