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Journal of the Korean Institute of Illuminating and Electrical Installation Engineers

ISO Journal TitleJ Korean Inst. IIIum. Electr. Install. Eng.
Title The Delay-Time Characteristics of DC Discharge in the Discharge Logic Gate Plasma Display Panel
Authors Jeong-duk Ryeom ; Hee-Ro Kwak
Page pp.28-34
ISSN 1225-1135
Keywords Cost Reduction ; Plasma Display Panel ; Driving Methode ; Logic Gate ; Discharge Logic
Abstract In this research, the characteristics of the DC discharge that was the logical gate input of discharge logic gate PDP newly proposed was considered. The logical output is induced by controlling the potential difference of inter-electrode according to the discharge path in the discharge logic gate. From the experimental result, the discharge time lag was shortened to 1/3 and the voltage has decreased to 1/2 in the case to apply priming discharge for improving stability of these DC discharges compared with the case when it is not applied. Moreover, after the priming discharge ends, the space charge generated by this discharge influences it up to about 30[㎲]. And, as a measured result of the influence that the space charge exerts on the DC discharge with the change in time and spatial distance, it has been understood that there is a possibility that going away spatially can slip out the influence of the discharge easily as for going away from the discharge time-wise. Therefore the conclusion that the discharge logic gates of each scanning electrode can be operated independently is obtained.