Mobile QR Code QR CODE

“JSTS has been indexed and abstracted in the SCIE (Science Citation Index Expanded) since Volume 9, Issue 1 in 2009. Furthermore, it continues to maintain its listing in the SCOPUS database and is recognized as a regular journal by the Korea Research Foundation.

※ The user interface design of www.jsts.org has been recently revised and updated. Please contact inter@theieie.org for any inquiries regarding paper submission.

Journal Search

  1. Home
  2. Archive
  3. JSTS 2019-12(Vol.19 No.06)
XML PDF INFO REF
Title [REGULAR PAPER] Proactive Row Buffer Management for LPDDR2-NVM Devices
Authors Jaehyun Park;Donghwa Shin;Hyung Gyu Lee
DOI https://doi.org/10.5573/JSTS.2019.19.6.527
Page pp.527-539
ISSN 1598-1657
Keywords LPDDR2-NVM; phase change memory; proactive management; row buffer; prefetch
Abstract LPDDR2-NVM has been announced as an industry standard to efficiently interface the emerging non-volatile memory devices such as phase change memory (PCM). This standard interface has been adopted in most commercial PCM devices. However, existing PCM research has less addressed or overlooked this standard interface under assumption that it is similar to conventional DRAM interface. Unlike the conventional DRAM interface, the row buffer architecture specified in LPDDR2-NVM has several unique features in order to support the different characteristics of PCM operation. In this paper, we devise a proactive row buffer management for enhancing the performance with almost negligible implementation overhead, targeting LPDDR2-NVM compatible memory devices. Our extensive simulations demonstrate 12.2% performance enhancement and 0.3% energy reduction of memory system, on average, with fairly small cost overheads.