| Title |
A Time-based Transceiver Front-end Circuit with 1-tap IIR DFE and Relaxed Termination for Short-reach PCB Interconnect |
| Authors |
(Min-Kyun Chae) ; (Seung-Jun Bae) ; (Jung-Hwan Choi) ; (Kwang-Il Park) ; (Jung-Bae Lee) ; (Hong-June Park) |
| DOI |
https://doi.org/10.5573/JSTS.2021.21.1.009 |
| Keywords |
Low power interface; short-reach interface; relaxed termination; time-based receiver; IIR DFE; IIR filter |
| Abstract |
A time-based low-power transceiver is proposed for short-reach PCB interconnect which connects two chips closely placed on a printed circuit board (PCB). This was achieved by reducing the I/O signaling power of transmitter (TX) with the increase of on-die termination (ODT) resistance. The short-reach PCB interconnect is approximated as a single-time-constant RC channel due to the large ODT resistance. The increase of inter-symbol interference (ISI) by the increased R-C time constant of channel was compensated by using a 1-tap infinite-impulse-response (IIR) decision-feedback equalizer (DFE) at receiver (RX). The RX circuit is composed of a cascaded connection of a voltage-to-time converter, an IIR DFE, a FIR DFE and a time comparator. The transceiver chip was implemented in 65 nm CMOS technology; in tests with a 1.6-mm micro-strip line channel the transceiver achieved maximum data-rate of 12 Gb/s at 0.8 V supply and minimum energy efficiency of 0.37 pJ/b at 8 Gb/s and 0.75 V supply. |