I. INTRODUCTION

GaN-based high-electron-mobility transistors (HEMTs) have shown great potential for high-frequency and high-power, and high temperature applications, because they have superior material properties such as high electron mobility, high 2DEG density, high saturation velocity, large band gap energy, and high breakdown field ^(1-3). However, they still suffer from surface-related problem such as current collapse phenomena, which not only impede device reliability but also degrade power efficiency in GaN-based devices ^(4-6). To improve the RF performance for millimeter-wave application, scaling down device dimensions, i.e., reducing both the gate length (L$_{\mathrm{G}}$) and the AlGaN barrier thickness is required along with high 2DEG channel mobility and sheet carrier density. As the thickness of the AlGaN barrier decreases, however, the 2DEG properties becomes degraded after high temperature annealing for ohmic contact ⁽⁷⁾. Therefore, a surface protection layer is usually required to protect the AlGaN surface from the thermal damage during rapid thermal process (RTP). And although several plasma treatments have been recently reported showing that the use of NH$_{3}$ ⁽⁸⁾, O$_{2}$ + CF$_{4}$ ⁽⁹⁾, and O$_{2}$/SF$_{6}$ ⁽¹⁰⁾ plasma pretreatments prior to passivation could improve device performance. However, in the treatment process, there is a difficulty to take a step to be added, a plurality of optimized conditions. In this work, we present a new structure of protecting the surface of AlGaN/GaN HEMT by using fin thin Al$_{2}$O$_{3}$ layer instead of relatively thick conventional Si$_{3}$N$_{4}$ or SiO$_{2}$ layer, which not only improves the device performance, but also simplifies the fabrication process step.

II. EXPERIMENT

The AlGaN/GaN heterostructure samples were grown using metal organic chemical vapor deposition (MOCVD) on semi insulating SiC substrate. The epitaxial structures consisted of 60 nm-thick AlN buffer, 2 ${\mathrm{\mu}}$m-thick semi-insulating GaN buffer/channel layer, Si modulation-doped 13 nm-thick AlGaN barrier layer, and 3 nm-thick GaN capping layer was sequentially. The hall mobility and sheet carrier density of the samples were approximately 2100 cm$^{2}$/Vs and 0.9 ${\times}$ 10$^{13}$ /cm$^{2}$, respectively.

For the device fabrication, as shown in Fig. 1, two different surface protection techniques were applied to prevent the AlGaN surface from being damaged during high temperature RTP for ohmic contact; surface protection with 60 nm-thick Si$_{3}$N$_{4}$ layer (process A) and 8-nm thick Al$_{2}$O$_{3}$ layer proposed in this work (process B). In this work, double passivation layers, which consists of an 8 nm-thick Al$_{2}$O$_{3}$ layer deposited at 450 ℃ using atomic layer deposition system and a 60 nm-thick SiO$_{2}$ layer deposited by plasma-enhanced chemical vapor deposition, were used to passivate the device surface. The dielectric constant of Al$_{2}$O$_{3}$, Ɛ = 9.12, is larger than that of Si$_{3}$N$_{4}$ and SiO$_{2}$ and comparable with other ‘high-k’ materials. On the other hand, there is no need to remove the thin Al$_{2}$O$_{3}$ layer in process B for the gate formation.

The Al$_{2}$O$_{3}$ layer under the gate can be easily removed just by simply increasing the etch time for the gate recess, which not only simplifies the process step, but also effectively protects the device surface during the device fabrication. All other fabrication processes are same for the process A and B. For the ohmic contact, two-step RTP for both processes was carried out initially at low temperature of 500 $^{\circ}$C (20 sec) and then at higher temperature of 800 $^{\circ}$C (30 sec) in nitrogen ambient. The resistance parameters extracted from transmission-line measurement exhibited a low contact resistivity of 2.8 ${\times}$ 10$^{-6}$ Ω-cm$^{2}$ (contact resistance of 0.3 Ω-mm) and the sheet resistance of 318 Ω/${\square}$, almost same results for both process A and B. It is noticed that the sheet resistance for process A was not increased even after high temperature RTP, which indicates that the 8 nm thick-Al$_{2}$O$_{3}$ layer is also very effective for protecting the AlGaN surface as the thick Si$_{3}$N$_{4}$ layer. Ni/Au gate metal with gate length of 2 μm was deposited on the gate region by E-beam evaporator. It was confirmed in Fig. 2 that the current collapse has been improved by using process B. In order to further explore the RF performance, by using process B, we fabricated AlGaN/GaN HEMT with T-gate which has a gate length of 0.15 ${\mathrm{\mu}}$m.

III. RESULTS AND DISCUSSIONS

Fig. 2 shows comparison of I$_{\mathrm{DS}}$-V$_{\mathrm{DS}}$ characteristics for both devices A and B under various drain-stress voltages after SiO$_{2}$ deposition on the thin Al$_{2}$O$_{3}$ layer. The solid, dashed, and dotted lines correspond to I -V sweeps with the initial drain stress V$_{\mathrm{DS0}}$ of 10, 20, and 30 V, respectively. As shown in Fig. 2(a), device A exhibits reduced drain-stress-dependent current collapse after 60 nm-thick SiO$_{2}$ deposition, but the collapse still exists with apparently larger knee voltage compared to that of the device B. A transconductance (gm) was about 190 and 200 mS/mm for device A and B, respectively. Threshold voltages of both devices are almost same, but device B exhibits much better DC characteristics such as higher transconductance (g$_{\mathrm{m}}$), larger maximum drain current, and better pinch-off with lower knee voltage. This clearly indicates that the Al$_{2}$O$_{3}$ layer in device B becomes dense during high temperature ohmic RTP and well combined with the surface of the GaN capping layer to effectively reduces the trap density at the surface of the device. On the other hand, the Al$_{2}$O$_{3}$ layer deposited after gate metallization in device A does not experience high temperature anneal and is loosely combined with the GaN surface which is not effective in passivating the surface. The reduced current collapse after deposition of relatively thick SiO$_{2}$ is believed to be due to the decreased electron injection into the surface between the gate and the drain electrode. The gradual reduction in current for V$_{\mathrm{DS}}$ > 7 V is attributed to self-heating effect. For device B, the current collapse is not significant as shown in Fig. 2(b), and also showing the self-heating effect. The I-V characteristic and transfer curve of this device are shown in Fig. 3, respectively. The device exhibited a maximum drain current of 943 mA/mm and maximum transconductance (g$_{\mathrm{m}}$) of 370 mS/mm at a gate bias of -2 V and a drain bias of 10 V. The device showed excellent pinch-off characteristics at V$_{\mathrm{GS}}$ = -3 V. As shown in Fig. 3(a), there is no decrease of drain current at high gate and drain voltage induced by self-heating effect because SiC substrate has high thermal conductivity. Fig. 4(a) shows the short circuit current gain (h$_{21}$) versus frequency for this fabrication process device after final SiO$_{2}$ passivation. An extrinsic current gain cut-off frequency (f$_{\mathrm{T}}$) was about 68.4 GHz, the maximum frequency of oscillation (f$_{\mathrm{max}}$) was about 129~GHz. As shown in Fig. 4(b), the maximum output power and the power added efficiency (P.A.E) of this device was 2.2 W/mm and 27.3 % at frequency of 16~GHz, respectively, at a gate bias of -2.3 V and a drain bias of 20 V. As shown in the figure, device apparently demonstrates good RF and load-pull performance because the thin Al$_{2}$O$_{3}$ layer deposited before ohmic RTP is very effective in reducing the surface trap density in the device as discussed above.

IV. CONCLUSIONS

We demonstrated the effect of thin Al$_{2}$O$_{3}$ surface protection layer on improving the device performance of AlGaN/GaN HEMTs. The Al$_{2}$O$_{3}$ layer, which was deposited before ohmic RTP, greatly reduces surface trap density which results in the improved current collapse. The use of the Al$_{2}$O$_{3}$ surface protection layer also simplifies device process steps in comparison with conventional SiO$_{2}$ or Si$_{3}$N$_{4}$ protection layer. The device with gate length of 0.15 ${\mathrm{\mu}}$m exhibited high transconductance of 365 mS/mm and drain current of ~943 mA/mm at V$_{\mathrm{GS}}$ = 1 V. The device also exhibited very high RF performances such as f$_{\mathrm{T}}$ and f$_{\mathrm{max}}$ of 67.8 and 125 GHz with P$_{\mathrm{out}}$ of 2.2 W/mm and P.A.E. of 27.3%, respectively.