YoonDaseul1
JooJi-Eun12
ParkSung Min12
-
(Department of Electronic and Electrical Engineering, Ewha Womans University, Seoul,
Korea)
-
(Smart Factory Multidisciplinary Program, Ewha Womans University, Seoul, Korea)
Copyright © The Institute of Electronics and Information Engineers(IEIE)
Index Terms
CMOS, current-conveyor, feedforward control-voltage generator, mirrored cascode, TIA
I. Introduction
Recently, a low-power, low-cost CMOS LiDAR sensor has been very attractive because
it can provide strong immunity against ambient RF interferences (1,2). Most of the state-of-the-art LiDAR sensors utilize the time-of-flight (ToF) method
to measure the distance to targets by emitting optical pulses and recovering the reflective
pulses.
Fig. 1 depicts a simplified block diagram of a linear-mode LiDAR sensor, in which a transmitter
(Tx) consists of a laser diode and its driver to emit optical pulses, whereas a receiver
(Rx) comprises a photodiode, a transimpedance amplifier (TIA) and a post-amplifier
(PA). A time-to-digital converter (TDC) receives START signals from Tx for the initialization
of range detection, and then detects STOP signals from Rx for the determination of
target distance.
Among these blocks, the TIA is the most critical circuit to optimize the performance,
thus requiring a number of characteristics, including a variable transimpedance gain
with automatic gain-control (AGC) to accommodate the input currents from a few micro-amperes
to a few milli-amperes, a wide bandwidth for narrow pulse recovery, a low noise current
spectral density for weak reflected signal detection, and a low power dissipation
per channel for chip reliability (2). In particular, wide bandwidth is necessary to maintain the narrow pulse-width of
the reflected pulses. Otherwise, severe pulse spreading cannot be avoided especially
when the reflected optical power is strong, (i.e., with large input photocurrents),
thus deteriorating precise target detection. Simultaneously, a narrow bandwidth of
TIA is required to reduce noise particularly when weak optical signals are detected.
Therefore, a variable bandwidth depending upon the amplitudes of incoming input photocurrents
is mandatory to optimize the noise performance.
Fig. 1. Block diagram of a typical LiDAR system (6).
Fig. 2. Schematic diagram of the proposed mirrored current-conveyor transimpedance
amplifier (MCC-TIA).
Hence, AGC function is mandatory to change the feedback resistance, and thus to accommodate
a wide range of incoming photocurrents (1-5). Many previous researches have realized AGC circuits either by utilizing an off-chip
external control, or by using a negative feedback control.
However, these conventional methods cannot be directly applied to LiDAR sensors because
a single narrow pulse should be detected. Not to mention the off-chip manual control,
the negative feedback gain-control cannot fulfil the variation of transimpedance gain
within a narrow single pulse, thereby occurring detection errors. In this paper, we
realize a fast AGC function by exploiting a novel feedforward control-voltage generator.
II. Circuit Description
Fig. 2 depicts the block diagram of the proposed mirrored current-conveyor transimpedance
amplifier (MCC-TIA), consisting of the MCC input stage followed by an inverter transimpedance
stage (INV-TIS) with a feedback resistor array (FRA), a feedforward control-voltage
generator (FCG), and an output buffer (OB).
1. Mirrored Current-conveyor (MCC) Input Stage
The MCC input stage comprises a parallel combination of five symmetric current-conveyor
input buffers (SCC-IBs) that are located right after the photodiode, thereby functioning
as a current-buffer and enabling to isolate a rather large parasitic capacitance of
the photodiode from the following INV-TIS. The five SCC-IB blocks are simultaneously
turned-on in parallel. Namely, the input impedance of the MCC input stage can be reduced
significantly, thus accommodating the large input currents up to 2.24 mA$_{\mathrm{pp}}$.
On the contrary, the output resistance of the MCC input stage can be approximately
enlarged to $\sim \frac{1}{2}\left(\mathrm{g}_{\mathrm{m}}\mathrm{r}_{\mathrm{o}}^{2}\right)$
owing to the cascode configuration, where g$_{\mathrm{m}}$ and r$_{\mathrm{o}}$ represent
the transconductance and the output resistance of transistors, respectively. Thereby,
the output voltage (IB_O) of the MCC input stage depends linearly upon the amplitude
of the incoming input currents. Then, the increased output voltages turn on the following
FCG circuitry and hence the NMOS switches in the feedback resistor array (FRA).
Fig. 3 shows the schematic diagram of a SCC-IB in which a modified NMOS cascode circuit
(M$_{1}$~M$_{4}$) is merged to its symmetric PMOS counterpart (M$_{5}$~M$_{8}$). Therefore,
the input currents (i$_{\mathrm{PD}}$) delivered from the photodiode can be symmetrically
divided into two paths. In other words, i$_{\mathrm{PD,n}}$ flows through the NMOS
cascode circuit (i.e., M$_{1}$&M$_{3}$), whereas i$_{\mathrm{PD,p}}$ flows into the
PMOS cascode circuit (i.e., M$_{5}$&M$_{7}$). These two currents are mirrored onto
the cascode circuits (i.e., M$_{2}$&M$_{4}$ and M$_{6}$&M$_{8}$), respectively. Due
to the large output resistance of the cascode circuit, it becomes possible that almost
no loss of the input currents occurs in this SCC-IB scheme.
Thereafter, the mirrored currents are summed together and flow out of the feedback
resistor (R$_{\mathrm{F}}$) of the INV-TIS. Hence, a positive transimpedance gain
can be generated which is different from the case of a conventional voltage-mode inverter
TIA.
Fig. 3. Schematic diagram of the proposed SCC-IB block.
Fig. 4. Schematic diagram of the INV-TIS with FRA.
Fig. 5. Schematic diagram of the feedforward control-voltage generator.
According to small signal analysis, the input resistance of the MCC input stage depends
upon how many SCC-IB blocks are turned on. With only SCC-IB#3 switched on, the input
resistance is given by,
, where g$_{\mathrm{mi(i=1,7)}}$ is the transconductance of M$_{\mathrm{i(i=1,7)}}$.
Provided that g$_{\mathrm{m1 }}$= g$_{\mathrm{m7 }}$= g$_{\mathrm{m}}$, the input
resistance becomes equal to 1/2g$_{\mathrm{m}}$.
With other two SCC-IB blocks (#2 & #4) added, the input resistance of the MCC input
stage is given by,
Then, all the SCC-IB blocks (#1~#5) are turned-on simultaneously, the input resistance
is given by,
2. INV-TIS with FRA & FCG
Fig. 4 shows the schematic diagram of the INV-TIA with the FRA that includes five feedback
resistors, i.e., R$_{\mathrm{Fi (i=1~5)}}$ which can be turned-on by utilizing thick-gate
NMOS switches. These pairs of thick-gate NMOS switches are controlled by the proposed
feedforward control-voltage generator (FCG) that consists of two-stage cascode amplifiers
and an MIM capacitor (C$_{\mathrm{MIM}}$ = 5 pF) as a low-pass filter (R$_{1}$ = 2.3
kΩ shown in Fig. 5). In particular, the second-stage cascode amplifier utilizes thick-gate NMOS transistors
with R$_{2}$ (= 3.3 kΩ.), thereby generating a 2.5-V to the NMOS switches in the INV-TIS.
The mechanism of the FCG can be simply described as below. First, the FCG takes the
positive output voltage (IB_O) of the preceded MCC input stage. Then, it provides
the final 2.5-V DC voltage (FCG_O) to the NMOS switches in the FRA. Thus, the transimpedance
gain of the INV-TIS can vary automatically according to the magnitude of the incoming
input currents from the photodiode. With the input currents larger than 1.12 mA$_{\mathrm{pp}}$,
the FCG turns on all the NMOS switches of the FRA. Thereby, the INV-TIS yields the
lowest transimpedance gain and enables to accommodate the larger input currents.
With the input currents of 80 $\mu$A$_{\mathrm{pp}}$ ~ 1.12 mA$_{\mathrm{pp}}$, the
FCG cuts off the pair of R$_{\mathrm{F3}}$. Therefore, the INV-TIS can boost the transimpedance
gain 3x higher.
Fig. 6. Layout of the MCC-TIA.
With the small currents less than 80 $\mu$A$_{\mathrm{pp}}$, the FCG cannot generate
a 2.5-V DC voltage. Thus, only a feedback resistor R$_{\mathrm{F1}}$ can be activated
and the INV-TIS amplifies the input currents with the highest transimpedance gain.
Small signal analysis indicates that the transimpedance gain of the INV-TIS is given
by,
, where $\textit{A}$$_{inv}$ is the voltage gain of the INV-TIS and $\textit{R}$$_{F,EQ}$
represents the equivalent feedback resistance of the FRA.
The bandwidth ($\textit{f}$$_{\mathrm{-3dB}}$) of the proposed MCC-TIA is determined
at the input node of the MCC input stage, and is given by,
, where $\textit{R}$$_{in}$ represents the input resistance of the MCC input stage
as described in (3), $\textit{C}$$_{pd}$ is the photodiode capacitance, $\textit{C}$$_{gs,n}$
is the gate-source capacitance of NMOS transistors (i.e., M$_{1}$&M$_{2}$), and $\textit{C}$$_{gs,p}$
is the gate-source capacitance of PMOS transistors (i.e., M$_{7}$&M$_{8}$), respectively.
Meanwhile, the input-referred equivalent noise current spectral density of the MCC-TIA
including five SCC-IB blocks is approximately given by,
, where $C_{tot}(=5C_{in}+C_{pd}$) represents the total capacitance at the input node
of the SCC-IB that comprises the input capacitance$\left(C_{in}=C_{gs1}+C_{gs2}+C_{gs7}+C_{gs8}\right)$of
the SCC-IB and the photodiode capacitance ($\textit{C}$$_{pd}$).
Eq. (6) clearly indicates that the noise contribution of the MCC input stage becomes
the dominant factor, and also that the noise current spectral density of the MCC-TIA
can be minimized under the condition that the input capacitance ($C_{in}$) is almost
equal to ($\frac{C_{pd}}{5}$), provided that g$_{\mathrm{m1}}$ = g$_{\mathrm{m2}}$
is assumed.
III. Simulation Results
Post-layout simulations were conducted for the MCC-TIA by utilizing the model parameters
of a 65-nm CMOS technology, where the photodiode was emulated by its electrical lumped-model
with a 25 Ω series resistor and a 500-fF parasitic capacitance. Fig. 6 shows the chip layout, in which the core occupies the area of 0.035 mm$^{2}$. Fig. 7 depicts the frequency response of the MCC input stage, which confirm that a single
SCC-IB block provides the input resistance of 140 Ω, the three combined SCC-IB blocks
yield 46 Ω, and the total five SCC-IB blocks generate 25 Ω input resistance, respectively.
It is noted that the peak and dip may be attributed to the parasitic inductance and
capacitance at the input node.
Fig. 8 reveals the transimpedance gain of 58 dBΩ, and the bandwidth of 2.5 GHz with the
equivalent feedback resistance 333 Ω in the INV-TIS that enables to accommodate the
input currents larger than 1.12 mA$_{\mathrm{pp}}$. For the input currents of 80 $\mu$A$_{\mathrm{pp}}$
~ 1.12 mA$_{\mathrm{pp}}$, the FCG cuts off the pair of R$_{\mathrm{F3}}$ by switching
off M$_{17}$ & M$_{20}$, and thus the transimpedance gain increases up to 68 dBΩ while
the bandwidth shrinks down to 892 MHz. Similarly, the FCG cutoffs the pairs of R$_{\mathrm{F2}}$
and R$_{\mathrm{F3}}$ for the smaller input currents than 80 $\mu$A$_{\mathrm{pp}}$.
Thereby, the feedback resistance increases further to provide the transimpedance gain
of 77 dBΩ with the bandwidth of 92~MHz. This shrunk bandwidth with enlarged transimpedance
helps to reduce the noise performance of the MCC-TIA.
Table 1. Performance Comparison with Previously Reported CMOS TIAs for LiDAR Applications
Parameters
|
(2)
|
(3)
|
(4)
|
(5)
|
This work
|
CMOS technology (nm)
|
180
|
180
|
350
|
180
|
65
|
Supply (V)
|
1.8
|
3.3
|
3.3
|
1.8/3.3
|
1.2/2.5
|
Input configuration
|
VCF
|
CM+SF
|
CF
|
SF
|
MCC
|
Bandwidth (MHz)
|
720
|
153
|
160
|
450
|
92~2,500
|
TZ gain (dBΩ)
|
76.3
|
106
|
78~110
|
60~100
|
58~77
|
Gain control
|
Auto (NFB)
|
External
|
External
|
External
|
Auto (FF)
|
Max. detectable current (mApp)
|
1.1
|
5.0
|
*0.022
|
*0.25
|
2.24
|
Min. detectable current (uApp)
|
1.14
(SNR = 12)
|
0.5
(SNR = 5)
|
0.053
(SNR = 3.3)
|
2.5
(SNR = 5)
|
18
(SNR = 14)
|
Undesired pulse spreading
|
Yes
|
Yes
|
Yes
|
Yes
|
No
|
Power dissipation (mW)
|
29.8
|
16.5 (w/o OB)
|
79
|
6.6
|
40
|
**FoM (mW/MHz)
|
0.0414
|
0.108
|
0.494
|
0.0147
|
0.016
|
Chip area (mm2)
|
5.0 x 1.1
|
1.2 x 1.13
|
1.0 x 1.2
|
4.8 x 0.85
|
1.0 x 1.0
|
VCF: voltage-mode CMOS feedforward, CM+SF: current-mirror + shunt feedback, CF: capacitive
feedback
MCC: mirrored current-conveyor, NFB: negative feedback, FF: feedforward, SNR: signal-to-noise
ratio, OB: output buffer
* Estimated, ** FoM = Bandwidth / Power dissipation (mW/MHz)
Also, the simulated minimum equivalent noise current spectral density is 16.8 pA/sqrt(Hz)
which leads to 0.16~$\mu$A$_{\mathrm{RMS}}$ input noise current and hence -29.5 dBm
optical sensitivity for bit-error-rate (BER) of 10$^{-12}$, which certainly satisfy
the SNR of 14. Fig. 9 presents the simulated pulse responses of the MCC-TIA which vividly show the narrow
pulse recovery resulting from the FCG circuitry. Fig. 9(a) clearly illustrates the pulse-width variation for the case of 1.12 mA$_{\mathrm{pp}}$
input current, where the output pulse spreads 3x wider without the FCG circuit.
Fig. 7. Simulated input impedance of the MCC input stage.
Fig. 8. Simulated frequency response of the MCC-TIA.
Fig. 9(b) depicts the pulse-width variation for the case of the largest input current of 2.24
mA$_{\mathrm{pp}}$, in which it is clearly seen that the output pulse spreads 3x wider
unless the FCG circuit is equipped. It is also noted that a delay occurred in the
FCG is less than 80 ps and thus can be neglected (~2.7 %) in a 3-ns pulse width.
Fig. 9. Simulated pulse responses of the MCC-TIA with different input currents of
(a) 1.12 mA$_{\mathrm{pp}}$, (b) 2.24 mA$_{\mathrm{pp}}$, respectively, and their
corresponding output voltage signals comparing the pulse spreading effect with and
without the FCG circuitry.
Fig. 10 shows the simulated eye-diagrams of the proposed MCC-TIA at 200 Mb/s with different
input currents of 18 $\mu$A$_{\mathrm{pp}}$ and 200 $\mu$A$_{\mathrm{pp}}$, respectively.
Each output amplitude corresponds to 79 dBΩ and 66 dBΩ transimpedance gain, indicating
that there exist slight mismatches (~ 2 dB) from the pulse simulations.
Fig. 10. Simulated eye-diagrams of the MCC-TIA for 2$^{31}$-1 PRBS input currents
at 200-Mb/s data rates (a) 18 $\mu$A$_{\mathrm{pp}}$, (b) 200~$\mu$A$_{\mathrm{pp}}$,
respectively.
Table 1 summarizes the performance of the proposed MCC-TIA with the previously reported CMOS
TIAs. Ref. (2) demonstrated a voltage-mode CMOS feedforward (VCF) input configuration to double
the transimpedance gain. Despite the AGC circuit, it could not avoid the pulse spreading.
Also, the maximum detectable current was limited to 1.1 mA$_{\mathrm{pp}}$. Ref. (3) merged a current-mirror (CM) input configuration with a shunt-feedback (SF) topology
to achieve high transimpedance gain and wide dynamic range. Here, the AGC function
was conducted by using an external field programmable gate array (FPGA). Ref. (4) utilized a capacitive feedback (CF) topology to obtain low noise currents of nano-ampere
levels. Yet, the gain-control function was conducted manually to provide both low-gain
and high-gain modes, in which the maximum detectable current was limited to 250 $\mu$A$_{\mathrm{pp}}$.
Also, pulse spreading was still present. Ref. (5) incorporated a shunt-feedback TIA with an external gain-control, where the maximum
detectable current was limited to 25 $\mu$A$_{\mathrm{pp}}$, and the pulse spreading
existed. In this work, we have demonstrated a feedforward gain-control mechanism to
render the AGC function within the narrow pulse-width of a single-shot optical pulse,
thus enabling to remove the undesired pulse spreading. The maximum and minimum detectable
currents are 2.24 mA$_{\mathrm{pp}}$, and 18 $\mu$A$_{\mathrm{pp}}$, respectively.
IV. CONCLUSIONS
We have presented a current-mode MCC-TIA which achieved narrow pulse recovery and
automatic gain-control within a narrow single pulse. The MCC-TIA can provide a low-cost
LiDAR sensor solution.
ACKNOWLEDGMENTS
This work was supported by the National Research Foundation of Korea (NRF) grant funded
by the Korea government (MSIT) (No. 2020R1A2C1008879). The EDA tool was supported
by the IC Design Education Center. The support of BrainKorea21-four is acknowledged.
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Author
Daseul Yoon received the B.S. degree in electronic and electrical engineering from
Ewha Womans University, Korea, in 2018. She is currently working toward the MSc degree
in the analog circuits and systems lab. at the same university. Her current research
interests include integrated circuits and architectures for CMOS analog front-end
designs for short distance optical application systems and sensor interface IC design.
Ji-Eun Joo received the B.S. degree in electronic and electrical engi-neering from
Ewha Womans University, Korea, in 2020. She is currently working toward the MSc degree
in the analog circuits and systems lab. at the same university. Her current research
interests include silicon photonics, and CMOS optoelectronic integrated circuits and
architectures for short distance optical application systems and sensor interface
IC designs.
Sung Min Park received the B.S. degree in electrical and electronic engineering from
KAIST, Korea, in 1993. He received the M.S. degree in electrical engineering from
Univer-sity College London, U.K., in 1994, and the Ph.D. degree in electrical and
electronic engineering from Imperial College London, U.K., in May 2000. In 2004, he
joined the faculty of the Department of Electronics Engineering at Ewha Womans University,
Seoul, Korea, where he is currently a Professor.