1. Model Implementation in BSIM
The gate leakage current model is based on the inelastic trap-assisted tunneling process
(ITAT). The model describes electrons tunneling to deep-lying trap states and, immediately,
released to positions deeper than the original position, and subsequently tunneling
to the gate (15). In terms of trap-related parameters, $X_{t}$, $\phi _{t}$, ${CCS}$, and ${NOID}$,
defined in Table 1, the expressions for the gate leakage current density with the drain-to-source
Table 1. Trap-related parameters of noise model of gate leakage current
voltage $V_{ds}$ = 0 $V$ are rewritten as (15)
with
where ${q}$ is the electron charge, $\mathrm{\hslash }$ is the reduced Planck constant,
$\varepsilon _{ox}$ is the oxide dielectric constant, $\phi _{b}$ is the Si-SiO$_{2}$
barrier height, $m_{ox}$ is the effective mass of tunneling carriers, $t_{ox}$ is
the oxide thickness, $E_{loss}$ is the energy loss, $F_{ox1,2}$ is the local electric
field, and ${C}$ is the correction function. The trap position$X_{t}=0.5t_{ox}$under
uniform distribution extracted from a fitting procedure is consistent with the contour
plot of experimental current density. The equations include the effects of charge
stored in the trap states and the dependence of the energy loss on the oxide electric
field (15).
The dependence of gate leakage current on the drain-source voltage is described by
the source-drain partition model which has been already implemented in BSIM6 (16). The gate tunneling current is given by
with
where ${W}$ is the channel width, ${L}$ is the channel length, $P_{igcd}$ is a fitting
parameter with a default value of 1, $V_{T}$ is the threshold voltage, and $V_{gs}$
is the gate-to-source voltage.
One possible mechanism for $1/f^{\gamma }$ noise contribution is for traps to affect
locally the barrier height or shape due to thermal noise of the frequency-dependent
conductance of the oxide slow traps (17). This barrier height fluctuation (BHF) in turn modulates the tunneling transmission,
and causes the fluctuation in the tunneling current. The $1/f^{\gamma }$ noise model
of gate leakage current is implemented into BSIM6 with three assumptions, 1) The oxide
slow traps are uniformly distributed over the energy and space, 2) the parallel trap
conductance and capacitance is constant over low frequencies, and 3) the carrier tunneling
is effective for trap levels around the quasi-Fermi level. Thus, the $1/f^{\gamma
}$ noise model of gate leakage current can be simplified as (4,7)
with
where $\lambda _{t}=2\sqrt{2m_{ox}\phi _{b}}/\mathrm{\hslash }$, ${f}$ is the frequency,
$C_{ox}$ is the oxide capacitance, $V_{ox}$ is the oxide voltage, $\psi _{s}$ is the
surface potential, $V_{FB}$ is the flat-band voltage, and $V_{poly}$ is the polysilicon
voltage drop.
The mechanism for shot noise associated with generation-recombination process can
be explained by carrier transport based on trap-assisted tunneling (7,18,19). The generation rate, i.e., the transition rate from the substrate ($g_{st})$ and
the gate ($g_{gt})$ to the unoccupied trap in the oxide, and recombination rate, i.e.,
the transition rate from the occupied trap to the substrate ($r_{ts})$ and the gate
($r_{tg})$, are caused by the statistical occupancy fluctuation of fast oxide traps
in the oxide. The time constant $\tau _{fast}$ is associated with the rate equation
for carrier number fluctuation $\Delta N$ with $\tau _{fast1}$ and $\tau _{fast2}$being
the time-constants related to the variation of the generation-recombination rate due
to the carrier number fluctuations through the substrate and gate, respectively (7). Making a Fourier analysis of the fluctuations $\Delta r_{tg}$ in the recombination
rate and $\Delta g_{st}$ in the generation rate and Langevin equation for $\Delta
N$, the Lorentzian-modulated(LM) shot noise model is given by (7)
with
where $F^{Fano}$ is the Fano factor, $\tau _{fast1,2}$ is the local time constants,
${N}$ is the total number of carriers, and ${g}$ and ${r}$ are the uniform generation
and recombination rate, respectively. The signs of Eq. (8c) and (8d) depend on
Fig. 1. Enhancement and suppression in the Fano factor, depending on the signs of
local time constants ($f$ = 10 kHz).
the positive or negative correlation between tunneling current components. As illustrated
in Fig. 1, for example, different signs of the time constants lead to enhanced shot noise.
The Fano factor for nitrided oxide nMOSFETs was simulated with ${f}$ = 10 kHz, $t_{ox,eq}=2.2\,\,\mathrm{nm}\,,
$$\varepsilon _{ox}=5.7\varepsilon _{0}, $$\phi _{b,ox}=2.6\,\,\mathrm{eV}\,, $$m_{ox}=0.4m_{0}$,
and $NOIE=2\times 10^{12}\,\,\mathrm{cm}^{- 2}\mathrm{eV}^{- 1}$at ${T}$ = 300 K.
Due to the quantized energy levels in the inversion layer, the peak charge density
is situated at a distance away from the Si-SiO$_{2}$ interface (4). This results in the enhancement in the oxide thickness and the reduction in the
oxide voltage. Therefore, the quantum effects are taken into account by using the
correction for the oxide thickness, $t_{ox}^{QM}$, and the oxide voltage, $V_{ox}^{QM}$,
as follows
where $x_{n}^{QM}$ is the average centroid position from the interface and $\psi _{s}^{QM}$
is the QM corrected surface potential.
2. Benchmark Tests
For the practical application of the compact noise model of gate leakage current,
the models are implemented into BSIM6 in public domain, as shown in
Fig. 2. Implementation of the gate leakage current and noise models into the BSIM
public domain platform.
Fig. 2. The basic device parameters are also used for the current and noise models, but
the trap-related parameters are newly introduced into simulators. The validation for
the compact model is derived from the comparisons of simulation results and measurements.
nMOSFETs used for measurements were fabricated with using a manufacturable remote
plasma nitride oxide (RPNO) process (15). The gate oxide was grown with both furnace and rapid-thermal based processes. Nitridation
was performed by exposing the gate oxide to a short, high density, remote helicon-based
nitrogen discharge. Following N$_{2}$-plasma nitridation and post-nitridation anneal
of the gate oxide, an undoped poly-Si gate layer was deposited. For n+ gates, P was
implanted, and rapid-thermal annealing was then performed in N$_{2}$ for different
durations. All tests are to be done using a test circuit of a single MOSFET and an
input deck in SPICE format is provided in Fig. 3(a). The models have been implemented through b6noi.c file of BSIM6 which is C code with
higher efficiency. As described in Fig. 3(b), several functions are provided to calculate the gate leakage current, 1/${f}$ gate
current noise, gate shot noise, and 1/${f}$ drain current noise. Fig. 4(a) shows the comparison of the test results and measured data of gate leakage current
as a function of drain-source voltage, and the current density versus gate-source
voltage for the inset. The test for nitrided oxide nMOSFETs was performed by using
$W=10\mu \mathrm{m}\,, $ $L=10\mu \mathrm{m}\,, $ $t_{ox,eq}=$ 2.2 nm, $\varepsilon
_{ox}=5.7\varepsilon _{0}$, $\phi _{b,ox}=2.6\,\,\mathrm{eV}$, $m_{ox}=0.4m_{0}$,
and $NOID=NOIE=2\times 10^{12}\,\,\mathrm{cm}^{- 2}\mathrm{eV}^{- 1}$at ${T}$ = 300
K. For different gate oxide processing conditions, the trap
Fig. 3. (a) Input deck, (b) implemented b6noi.c file of BSIM to simulate the gate
leakage current noise of a single MOSFET for benchmark test.
density parameters ($NOID,NOIE$) are technology dependent. The thermal oxide devices
have a trap density level one to two orders of magnitude lower than that of nitrided
oxide devices (20). It is observed that the
Fig. 4. Comparison of the benchmark test results and measured data (a) the gate leakage
current versus $V_{ds}$ for different $V_{gs}$ and the current density versus $V_{gs}$
for the inset, (b) the noise characteristics as a function of $f$ for different $V_{gs}$
($W=10\mu \mathrm{m}\,,$$L=10\mu \mathrm{m}\,,$$t_{ox,eq}=2.2\,\,\mathrm{nm}\,,$$NOID=NOIE=2\times
10^{12}$ $\mathrm{cm}^{- 2}\mathrm{eV}^{- 1}$).
simulation results have good agreement with measurements. Also, Fig. 4(b) illustrates the noise characteristics as a function of frequency for different gate-source
voltages. It is also verified that the compact noise model can accurately predict
the noise behavior over the frequency and bias ranges.