JoSengjun1
KimHyeonjun1
KwonKuduck1
-
(Department of Electronics Engineering and Department of BIT Medical Convergence, Kangwon
National University, Chuncheon 24341, Korea )
Copyright © The Institute of Electronics and Information Engineers(IEIE)
Index Terms
Bluetooth low energy, current-bleeding circuit, current-reuse, IoT, I/Q mixer, gain and phase mismatch, low-IF receiver, low-voltage, quadrature generator, quadrature transconductor
I. INTRODUCTION
Bluetooth low energy (BLE) is a representative communication standard, that is widely
utilized in Internet of Things (IoT) sensor devices. Ultra-low-power BLE transceivers
for IoT applications have been actively studied and developed (1-19). Most BLE receivers (RXs) employ a low-intermediate frequency (IF) single-quadrature
architecture to achieve low 1/$\textit{f}$ noise with a channel bandwidth of 1 MHz.
However, low-IF RXs suffer from a so-called image problem. When the sensitivity degradation,
caused by the image signal, is less than 0.3 dB, an image rejection ratio (IRR) greater
than 21 dB is required from a carrier-to-image interference ratio ($\textit{C}$/$\textit{I}$$_{\mathrm{Image}}$)
of ${-}$9 dB (17,20). In general, quadrature signals for single-quadrature mixing are generated by a quadrature
voltage-controlled oscillator or divide-by-two circuit in the local oscillator (LO)
path (1-12). Recently, owing to less restrictive IRR requirements, numerous studies on BLE RXs,
whose quadrature signals are provided by a quadrature low-noise amplifier (LNA) or
a quadrature mixer in the RF path or quadrature LO buffer in the LO path, have been
published (15-18,21). In these studies, the quadrature LNA and mixer have a lower voltage gain and degraded
noise figure (NF) instead of providing quadrature signals without additional power
consumption. Moreover, in terms of the RX sensitivity, it is more advantageous that
the quadrature mixer provides the quadrature signals rather than the quadrature LNA.
Kwon $\textit{et al.}$ introduced the in-phase/quadrature (I/Q) down-conversion active
mixer to generate quadrature signals (21). The quadrature mixer employs a common-source (CS) amplifier with capacitive degeneration
and a compensating resistor. In addition, a current-bleeding circuit is used to reduce
the 1/$\textit{f}$ noise of the switching stage. If the current consumed by the current-bleeding
circuit can be reused to boost the overall transconductance ($\textit{g}$$_{\mathrm{m}}$)
and generate quadrature signals, the performances of the I/Q mixer can be improved.
Fig. 1. (a) Conventional I/Q mixer architecture with quadrature transconductor (21), (b) proposed I/Q mixer architecture with current-reused quadrature transconductor.
In this paper, a 2.4 GHz low-power BLE RX front-end using a new I/Q down-conversion
active mixer with a current-reused quadrature transconductor is proposed. Section
II introduces the new I/Q down-conversion active mixer architecture with a current-bleeding
circuit that performs $\textit{g}$$_{\mathrm{m}}$-boosting and generates quadrature
signals. A detailed circuit implementation of the BLE RX front-end is presented in
Section III. Section IV discusses the simulation results. Finally, Section V concludes
this paper.
II. A New I/Q Down-conversion Mixer Architecture with Current-reused Quadrature Transconductor
This section introduces a new I/Q down-conversion active mixer architecture with a
current-reused quadrature transconductor. Fig. 1 illustrates the conventional I/Q mixer architecture with a quadrature transconductor,
which was introduced in (21), and our new I/Q mixer architecture with a current-reused quadrature transconductor.
In the conventional I/Q mixer architecture, the current-bleeding circuit is only used
to reduce the 1/$\textit{f}$ noise of the switching stage, without reusing the current
flowing into the current-bleeding circuit to perform additional functions. In the
proposed I/Q mixer architecture, the current-bleeding circuit reduces the current
flowing into the switching stage and reduces its 1/$\textit{f}$ noise. It also performs
voltage-to-current conversion and provides quadrature signals. Therefore, the proposed
I/Q mixer architecture can improve the conversion gain and noise performance. The
output currents $\textit{I}$$_{\mathrm{RF,I}}$ and $\textit{I}$$_{\mathrm{RF,Q}}$
in the proposed current-reused quadrature transconductor of the I/Q mixer can be expressed
as
where $\textit{g}$$_{\mathrm{mN1}}$, $\textit{g}$$_{\mathrm{mN2}}$, $\textit{g}$$_{\mathrm{mP1}}$,
and $\textit{g}$$_{\mathrm{mP2}}$ denote the transconductances of $\textit{M}$$_{\mathrm{N1}}$,
$\textit{M}$$_{\mathrm{N2}}$, $\textit{M}$$_{\mathrm{P1}}$, and $\textit{M}$$_{\mathrm{P2}}$,
respectively, and $\textit{C}$$_{\mathrm{N}}$ and $\textit{C}$$_{\mathrm{P}}$ denote
the source degeneration capacitors. When $\textit{g}$$_{\mathrm{mN1}}$ $\textit{=
g}$$_{\mathrm{mN2}}$ $\textit{=}$ $\textit{g}$$_{\mathrm{mN}}$, $\textit{g}$$_{\mathrm{mP1}}$
$\textit{=}$ $\textit{g}$$_{\mathrm{mP2}}$ $\textit{=}$ $\textit{g}$$_{\mathrm{mP}}$,
$\textit{${\omega}$C}$$_{\mathrm{N}}$ $\textit{=}$ $\textit{g}$$_{\mathrm{mN2}}$,
and $\textit{${\omega}$C}$$_{\mathrm{P}}$ $\textit{= g}$$_{\mathrm{mP2}}$, the output
currents $\textit{I}$$_{RF,I}$ and $\textit{I}$$_{RF,Q}$ exhibit the following quadrature
relationships: |$\textit{I}$$_{\mathrm{RF,I}}$/$\textit{I}$$_{\mathrm{RF,Q}}$| = 1,
and ${\angle}$($\textit{I}$$_{\mathrm{RF,I}}$/$\textit{I}$$_{\mathrm{RF,Q}}$) = 90$^{\circ}$.
The overall transconductance of the current-reused quadrature transconductor can be
expressed as
Based on (3), the proposed current-reused quadrature transconductor boosts the overall
transconductance by reusing the current-bleeding circuit. Fig. 2 depicts the simulated conversion gain and NF of the proposed and conventional I/Q
mixers. The proposed architecture achieves a 3.7 dB higher conversion gain and a 3.1
dB lower NF.
III. Circuit Implementation
This section presents a detailed circuit implementation of the proposed low-power
BLE RX front-end. Fig. 3 illustrates the block diagram of the proposed 2.4 GHz low-IF single-quadrature BLE
front-end, which consists of a current-reused push-pull LNA with inductive source
degeneration and I/Q down-conversion single-balanced active mixers with a current-reused
quadrature transconductor.
Fig. 2. Simulated conversion gain and NF of the proposed and conventional I/Q mixer
architectures.
Fig. 3. Block diagram of the proposed BLE RX front-end.
Fig. 4. Schematic of the current-reused push-pull LNA with inductive source degeneration.
Fig. 4 depicts the proposed current-reused push-pull LNA with inductive source degeneration.
The effective transconductance of the current-reused push-pull architecture approximately
doubles with the same power consumption (6). Therefore, it can improve the voltage gain and noise performance. $\textit{C}$$_{\mathrm{EXN}}$
and $\textit{C}$$_{\mathrm{EXP}}$ are used to perform simultaneous noise and input
matching. The input impedance of the proposed push-pull LNA can be expressed as
Here, $\textit{g}$$_{\mathrm{mN}}$ and $\textit{g}$$_{\mathrm{mP}}$ denote the transconductances
of $\textit{M}$$_{\mathrm{N1}}$ and $\textit{M}$$_{\mathrm{P1}}$, $\textit{L}$$_{\mathrm{SN}}$
and $\textit{L}$$_{\mathrm{SP}}$ denote the source degenerated inductors, $\textit{C}$$_{\mathrm{TN}}$
= $\textit{C}$$_{\mathrm{EXN}}$ + $\textit{C}$$_{\mathrm{gsN}}$, and $\textit{C}$$_{\mathrm{TP}}$
= $\textit{C}$$_{\mathrm{EXP}}$ + $\textit{C}$$_{\mathrm{gsP}}$. $\textit{C}$$_{\mathrm{gsN}}$
and $\textit{C}$$_{\mathrm{gsP}}$ denote the gate-to-source capacitances of $\textit{M}$$_{\mathrm{N1}}$
and $\textit{M}$$_{\mathrm{P1}}$. For a simple and intuitive analysis, it is assumed
that $\textit{g}$$_{\mathrm{mN}}$ = $\textit{g}$$_{\mathrm{mP}}$ = $\textit{g}$$_{\mathrm{m}}$,
$\textit{r}$$_{\mathrm{oN}}$ = $\textit{r}$$_{\mathrm{oP}}$ = $\textit{r}$$_{\mathrm{o}}$,
$\textit{L}$$_{\mathrm{SN}}$ = $\textit{L}$$_{\mathrm{SP}}$ = $\textit{L}$$_{\mathrm{S}}$,
and $\textit{C}$$_{\mathrm{TN}}$ = $\textit{C}$$_{\mathrm{TP}}$ = $\textit{C}$$_{\mathrm{T}}$.
The input impedance of the LNA can be expressed as
Input matching is accomplished at the resonant frequency with Im($\textit{Z}$$_{\mathrm{IN}}$)
= 0. The resonant frequency is given by
and $\textit{Z}$$_{\mathrm{IN}}$ = $\textit{g}$$_{\mathrm{m}}$$\textit{L}$$_{\mathrm{S}}$/2$\textit{C}$$_{\mathrm{T}}$
= 50 Ω. The voltage gain of the proposed push-pull LNA from the voltage source $\textit{V}$$_{\mathrm{S}}$
with source resistance $\textit{r}$$_{\mathrm{S}}$ to $\textit{V}$$_{\mathrm{OUT}}$
can be expressed as
Fig. 5. Schematic of the I/Q down-conversion active mixer using the proposed current-reused
quadrature transconductor.
Fig. 6. Simulated gain and phase mismatches of the I/Q mixer.
Here, $\textit{Q}$$_{\mathrm{IN}}$ is the $\textit{Q}$-factor of the input impedance
network, and $\textit{Z}$$_{\mathrm{OUT}}$ denotes the output impedance of the LNA,
whose values are given approximately as
where $\textit{V}$$^{2}$$_{\mathrm{MN1}}$ and $\textit{V}$$^{2}$$_{\mathrm{MP1}}$
represent the output-referred noise voltages generated by $\textit{M}$$_{\mathrm{N1}}$
and $\textit{M}$$_{\mathrm{P1}}$, and ${\gamma}$ denotes the noise parameter of the
transistor. The proposed LNA halves the excess noise factor because its total output-referred
noise power is the sum of the noise powers generated by $\textit{M}$$_{\mathrm{N1}}$
and $\textit{M}$$_{\mathrm{P1}}$, and its total voltage gain is the sum of the voltage
gains provided by $\textit{M}$$_{\mathrm{N1}}$ and $\textit{M}$$_{\mathrm{P1}}$. Therefore,
compared to a conventional CS LNA with inductive source degeneration and additional
$\textit{C}$$_{\mathrm{EX}}$, the proposed current-reused push-pull LNA with inductive
source degeneration can achieve a larger voltage gain and lower noise performance.
Fig. 5 shows the I/Q down-conversion active mixer using the proposed current-reused quadrature
transconductor. The current-bleeding circuit reduces the 1/$\textit{f}$ noise of the
switching stage, performs voltage-to-current conversion, and generates quadrature
signals. Therefore, it can enhance the conversion gain and NF. In high frequencies,
the parasitic capacitances of main transistors in the current-reused quadrature transconductor
($\textit{M}$$_{\mathrm{N1}}$, $\textit{M}$$_{\mathrm{N2}}$, $\textit{M}$$_{\mathrm{P1}}$,
and $\textit{M}$$_{P2}$) can cause gain and phase mismatches. To compensate for both
mismatches and increase the design degree of freedom, compensating resistors of $\textit{r}$$_{\mathrm{N}}$
and $\textit{r}$$_{\mathrm{P}}$ are added (21).
Fig. 6 shows the simulated gain and phase mismatches of the proposed I/Q mixer. As shown
in Fig. 6, there is little difference in the BLE band. The proposed I/Q mixer can provide quadrature
signals with gain and phase mismatches of less than 0.15 dB and 0.65$^{\circ}$ in
the BLE band, respectively. These values are sufficient to provide an IRR of more
than 21 dB. The I-path conversion gain of the proposed I/Q mixer can be expressed
as
The I-path noise factor of the proposed I/Q mixer can be expressed as
where $\textit{V}$$^{2}$$_{\mathrm{MN1}}$, $\textit{V}$$^{2}$$_{\mathrm{MP1}}$, $\textit{V}$$^{2}$$_{\mathrm{MN3}}$,
$\textit{V}$$^{2}$$_{\mathrm{MP3}}$ and $\textit{V}$$_{RL}$ represent the output-referred
noise voltages generated by $\textit{M}$$_{\mathrm{N1}}$, $\textit{M}$$_{\mathrm{P1}}$,
$\textit{M}$$_{\mathrm{N3}}$, $\textit{M}$$_{\mathrm{P3}}$, and $\textit{r}$$_{\mathrm{L}}$,
respectively, $\textit{I}$$_{\mathrm{B}}$ denotes the dc current flowing into $\textit{M}$$_{\mathrm{N3,4}}$
of the switching stage, and $\textit{A}$ denotes the amplitude of the LO signal. In
$\textit{f}$$_{\mathrm{Mixer}}$, the switching noises of $\textit{M}$$_{\mathrm{N3}}$
and $\textit{M}$$_{\mathrm{N4}}$ are the dominant noise contributions. Because the
proposed I/Q mixer with the current-reused quadrature transconductor enhances the
overall transconductance, it has a smaller noise factor compared to that of the conventional
quadrature transconductor.
Table 1. Power breakdown of the BLE RX front-end
Block
|
Current
|
Power
|
LNA
|
0.4 mA
|
0.4 mW
|
I/Q mixer
|
0.6 mA
|
0.6 mW
|
Total
|
1 mA
|
1 mW
|
Fig. 7. Layout of the proposed BLE RX front-end.
Fig. 8. Simulated $\textit{S}$$_{11}$.
Fig. 9. Simulated conversion gain with a 2.44 GHz RF input signal.
The conversion gain and noise factor of the proposed BLE RX front-end can be expressed
as
IV. Simulation Results
The proposed low-power 2.4 GHz BLE RX front-end adopting the I/Q mixer with the current-reused
quadrature transconductor was designed in a 65-nm CMOS process. Fig. 7 illustrates the layout of the BLE RX front-end. The active area without bond pads
is 0.5~mm$^{2}$. It draws a dc bias current of 1 mA from a supply voltage of 1 V.
The power breakdown of the designed BLE RX front-end is presented in Table 1. The power consumptions of the LNA and I/Q mixer are 0.6 and 0.4~mW, respectively.
The following reported simulation results are based on the layout parasitic extraction.
The simulated input return loss ($\textit{S}$$_{11}$) of the BLE RX front-end is depicted
in Fig. 8. The $\textit{S}$$_{11}$ is less than -15 dB throughout the BLE operating frequency
range of 2.40-2.48 GHz. Fig. 9 depicts the simulated conversion gain of the RX front-end with a 2.44 GHz RF input
signal. A simulated conversion gain of 37.6 dB is obtained at an IF frequency of 2
MHz.
The simulated NF of the RX front-end with an IF frequency of 2 MHz is depicted in
Fig. 10. The obtained NF is 3.3 dB, which is measured at an RF frequency of 2.44 GHz. The
simulated input-referred third-order
Fig. 10. Simulated NF with a 2.44 GHz RF input signal.
Fig. 11. Simulated IIP3 and OIP3.
Table 2. Performance summaries of the proposed BLE receiver and comparison with previous
state-of-the-art works
References
|
Application
|
Process
|
Receiver
Topology
|
Current-Reuse
Topology
|
I/Q
Generation
|
Frequency
[GHz]
|
Gain
[dB]
|
NF
[dB]
|
IIP3
[dBm]
|
Pdc
[mW]
|
VDD
[V]
|
Area
[mm$^{2}$]
|
FOM
|
JSSC 2014
[1]
|
Zigbee
|
65 nm
CMOS
|
Low-IF
|
BLIXER
|
LO
|
1/2
|
2.4-2.48
|
57
|
8.5
|
−6
|
1.7
|
1.2/
0.6
|
0.24
|
-16.2
|
JSSC 2014
[2]
|
IoT
|
65 nm
CMOS
|
Low-IF
|
CR VCO-Filter
|
LO
|
1/2
|
0.43-0.96
|
50
|
8.1
|
−20.5
|
1.15
|
0.5
|
0.2
|
-28.5
|
JSSC 2017
[3]
|
Bluetooth
|
28 nm
CMOS
|
Low-IF
|
RF-to-BB-CR
|
LO
|
1/2
|
2.4-2.48
|
43.4
|
7.5
|
6
|
4.3
|
1.8
|
0.4
|
-7
|
MWCL 2019
[4]
|
IoT
|
65 nm
CMOS
|
Low-IF
|
RF-to-BB-CR
|
LO
|
1/2
|
0.9-0.92
|
40.7
|
1.94
|
−25.6
|
3.6
|
1.8
|
0.559
|
-28.7
|
TMTT 2018
[5]
|
BLE
Zigbee
|
28 nm
CMOS
|
Sliding-IF
|
LNA
|
LO
|
1/4
|
2.4-2.48
|
65
|
6.5
|
−20
|
0.64
|
0.8
|
0.251
|
-23.5
|
ISSCC 2020
[6]
|
BLE
|
22 nm
FDSOI
|
Zero-IF
|
LNTA
|
LO
|
1/2
|
2.4-2.48
|
61
|
5.5
|
−7.5
|
0.37
|
0.7
|
0.5
|
-7.2
|
JSSC 2018
[7]
|
Zigbee
|
65 nm
CMOS
|
Sliding-IF
|
CR Balun-LNA
Hybrid mixer
|
LO
|
1/2
|
2.4-2.48
|
57.8
|
15.7
|
−18.5
|
1.78
|
1
|
0.45
|
-36.6
|
ASSCC 2019
[8]
|
BLE
|
22 nm
FDSOI
|
Low-IF
|
LNTA
|
LO
|
1/2
|
2.4-2.48
|
32.3
|
9.4
|
-30
|
0.33
|
0.55
|
0.15
|
-34.1
|
CICC 2017
[9]
|
BLE
|
40 nm
CMOS
|
Zero-IF
|
LNA
|
LO
|
1/2
|
2.4-2.48
|
47-72
|
5.2
|
-19.7
|
0.98
|
1
|
0.7
|
-23.3
|
JSSC 2013
[10]
|
Zigbee
|
65 nm
CMOS
|
Low-IF
|
IF Amplifier
|
LO
|
1/8
|
2.4-2.48
|
83
|
6.1
|
-21.5
|
1.6
|
0.3
|
2.496
|
-28.4
|
CICC 2019
[11]
|
BLE
|
28 nm
CMOS
|
Low-IF
|
LNTA
|
LO
|
1/4
|
2.4-2.48
|
53.3
|
6.5
|
-32
|
0.35
|
0.9
|
0.1
|
-32.8
|
JSSC 2019
[12]
|
BLE
|
40 nm
CMOS
|
Zero-IF
|
LNTA
|
LO
|
DCO
|
2.4-2.48
|
86
|
6
|
−35
|
1.55†
|
0.85
|
0.3
|
-41.7
|
TCASII 2021
[13]
|
BLE
|
65 nm
CMOS
|
Low-IF
|
Gm-stage
|
LO
|
Quad.
LOBF
|
2.4-2.48
|
54.5
|
8.16
|
-27.5
|
2
|
0.8
|
1.65
|
-38
|
TMTT 2019
[14]
|
BLE
|
130 nm
CMOS
|
Low-IF
|
LNA
|
RF
|
RC PPF
|
2.4-2.48
|
42
|
7.2
|
−17
|
1.7†
|
1.2
|
0.7
|
-25.6
|
JSSC 2010
[15]
|
Zigbee
|
90 nm
CMOS
|
Low-IF
|
LMV
|
RF
|
LNTA /
RC PPF
|
2.4-2.48
|
76
|
10
|
−13
|
3.6
|
1.2
|
0.23
|
-28.1
|
JSSC 2015
[16]
|
BLE
|
130 nm
CMOS
|
Low-IF
|
LMV
|
RF
|
LNTA
|
2.4-2.48
|
56.1
|
15.1
|
−15.8
|
0.6
|
0.8
|
0.25
|
-28.6
|
TMTT 2021
[17]
|
BLE
|
65 nm
CMOS
|
Low-IF
|
Gm-stage
|
RF
|
LNA
|
2.4-2.48
|
49.5
|
8.2
|
-25.75
|
2.16
|
0.8
|
1.16
|
-36.6
|
ACCESS 2021
[18]
|
BLE
|
65 nm
CMOS
|
Low-IF
|
Quadrature
RF-to-BB-CR
|
RF
|
LNTA
|
2.4-2.48
|
42
|
13.2
|
−25
|
1.13
|
0.8
|
0.85
|
-38.5
|
This Work*
|
BLE
|
65 nm
CMOS
|
Low-IF
|
I/Q Mixer
|
RF
|
Mixer
|
2.4-2.48
|
37.6
|
3.3
|
−22.7
|
1
|
1
|
0.5
|
-23.3
|
* Simulation result
† It includes power consumption of the demodulator.
intercept point (IIP3) and output-referred third-order intercept point (OIP3) are
shown in Fig. 11. The two-tone test conditions for IIP3 are $\textit{f}$$_{1}$ = $\textit{f}$$_{\mathrm{LO}}$
+ 5 MHz, and $\textit{f}$$_{2}$ = $\textit{f}$$_{\mathrm{LO}}$ + 8 MHz. The obtained
IIP3 and OIP3 values are ${-}$22.73 and 13.26 dBm, respectively.
Table 2 summarizes and compares the performance of the proposed BLE RX front-end to those
of the current state-of-the-art approaches. For fair performance comparison of the
BLE RX front-ends, the following figure-of-merit (FOM) is used.
where $\textit{f}$ is the noise factor ($\textit{f}$ = 10$^{NF/10}$) and $\textit{P}$$_{dc}$
is the dc power consumption. As presented in Table 2, the proposed RX front-end demonstrates excellent NF performance with low power consumption
by employing the I/Q mixer with the current-reused quadrature transconductor.
IV. CONCLUSIONS
In this study, a 2.4 GHz low-power low-IF BLE RX front-end employing the new I/Q down-conversion
active mixer with the current-reused quadrature transconductor was designed in a 65
nm CMOS technology. The quadrature signals required for single-quadrature mixing were
generated at the transcondcutor of the I/Q mixer to reduce the power consumption and
NF. The proposed current-reused current-bleeding circuit of the I/Q mixer improved
the overall transconductance of the mixer, provided quadrature signals, and reduced
the 1/$\textit{f}$ noise of the switching stage. The designed BLE RX front-end obtained
a conversion gain of 37.6 dB, NF of 3.3 dB, and IIP3 of -22.73 dBm.
ACKNOWLEDGMENTS
This work was supported in part by the Basic Science Research Program through the
National Research Foundation of Korea (NRF) funded by the Ministry of Education under
Grant NRF-2018R1D1A1B07042804 and in part by the Ministry of Science and ICT, Korea,
under the Information Technology Research Center Support Program supervised by the
Institute for Information and Communications Technology Promotion (IITP) under Grant
IITP-2021-2018-0-01433. The chip fabrication and EDA tool were supported by the IC
Design Education Center (IDEC), Korea.
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Author
Sengjun Jo is currently studying integrated B. S. and M. S. program in Department
of Electronics Engi-neering, Kangwon National Univer-sity, Chuncheon, Korea.
His research interests include CMOS mmWave/ RF/analog integrated circuits and RF system
design for wireless communications.
Hyeonjun Kim is currently studying integrated B. S. and M. S. program in Department
of Electronics Engi-neering, Kangwon National Univer-sity, Chuncheon, Korea.
His research interests include CMOS mmWave/ RF/analog integrated circuits and RF system
design for wireless communications.
Kuduck Kwon received the B.S. and Ph.D. degrees in Electrical Engi-neering and Computer
Science from Korea Advanced Institute of Science and Technology (KAIST), in Daejeon,
Korea, in 2004 and 2009, respectively.
His doctoral research concerned digital TV tuners and dedicated short-range communication
(DSRC) systems.
From 2009 to 2010, he was a Post-Doctoral Researcher with KAIST, where he studied
a surface acoustic wave (SAW)-less receiver and developed RF transceivers for DSRC
applications.
From 2010 to 2014, he was a Senior Engineer with Samsung Electronics Co. LTD., Suwon,
Korea, where he was involved in studying software-defined receiver and developing
silicon tuner and cellular RFICs.
In 2014, he joined the Department of Electronics Engineering, Kangwon National University,
Chuncheon, Korea, where he is currently an Associate Professor.
His research interests include CMOS mmWave/RF/analog integrated circuits and RF system
design for wireless communications.