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  1. (Department of Electronics Engineering and Department of BIT Medical Convergence, Kangwon National University, Chuncheon 24341, Korea)



N-path filter, circulator, isolation, delay, low noise amplifier, low-loss, self-interference, self-interference cancellation, out-of-blocker

I. INTRODUCTION

Recently, in-band full-duplex (IBFD) wireless communication technology has garnered significant attention as a key technology for 6G and beyond 5G cellular applications [1,2]. In particular, considering that 5G new radio (NR) networks will continue to operate alongside 6G, research on the IBFD technology, which can efficiently utilize the existing limited frequency resources, is crucial. Unlike the traditional half-duplex (HD) approach, which divides the transmission into separate time or frequency slots, the IBFD technology enables simultaneous uplink and downlink transmissions in the same time and frequency band, ideally doubling the frequency utilization efficiency and data rates compared with HD. Additionally, it can reduce the latency compared with time-division duplexing (TDD).

However, in IBFD transceivers, the output signal from a transmitter (TX) can cause a strong self-interference (SI) at the receiver (RX), degrading its signal-to-noise/distortion ratio (SNDR). Therefore, achieving a sufficient self-interference cancellation (SIC) is essential for implementing IBFD transceivers. Fig. 1 shows a block diagram of a conventional IBFD transceiver. SIC techniques in IBFD transceivers can be categorized into antenna interface SIC [3-7], RF SIC [8-10], analog SIC [11,12], and digital SIC [13], with active research ongoing in each domain. To prevent SNDR performance degradation caused by the strong SI signal on the RX side, it is crucial to achieve high SIC performance in the antenna interface and RF domains.

Fig. 1. Block diagram of the conventional IBFD transceiver.
../../Resources/ieie/JSTS.2024.24.4.296/fig1.png

This alleviates the linearity requirements of the low-noise amplifier (LNA) and the following blocks. Representative antenna interface SIC techniques include an electrical-balanced duplexer (EBD) based on hybrid transformers and nonmagnetic circulators. While the EBD offers excellent TX-RX isolation of over 50 dB, it has the drawback of more than 3 dB insertion loss (IL) in both the TX and RX paths, impacting the power amplifier (PA) efficiency and RX noise figure (NF). On the other hand, nonmagnetic circulators exhibit TX and RX ILs of approximately 1-2 dB, but their TX-RX isolation is relatively poor at approximately 20-30 dB. However, compared with the SAW/FBAR duplexers used in FDD systems, both EBD and nonmagnetic circulators lack a strong out-of-band (OB) blocker rejection capability at the antenna, making them unable to mitigate the SNR degradation caused by strong OB blockers. Conventional IBFD research primarily focuses on enhancing the SIC performance, neglecting the degradation of the RX SNDR due to strong OB blockers. For the successful commercialization of IBFD transceivers without using additional SAW filters at the RF front end, these aspects should also be carefully considered.

In this paper, a band-selection balun-LNA employing a feedback network of a differential-to-single-ended N-path notch filter is presented to provide OB blocker rejection and enhance the blocker tolerance of the RX. A capacitor(C)-inductor (L)-C nonmagnetic circulator based on an N-path filter and a time-domain RF SIC with five delay taps is also introduced. This paper is structured as follows. Section II presents detailed circuit designs. Section III shows the simulation results. Finally, Section IV concludes the study.

II. PROPOSED CMOS CIRCULATOR AND BAND-SELECTION LNA WITH RF SIC

Fig. 2 depicts the proposed CMOS circulator and band-selection LNA with RF SIC. The circulator performs the first SIC, where the time-domain RF SIC with delay taps performs the second SIC at the LNA input. This two-stage SIC process prevents saturation of the LNA and subsequent circuits owing to strong SI signals or degradation of the SNDR owing to the nonlinearity of the LNA and subsequent blocks. The band-selection balun-LNA that uses the D2S N-path notch filter feedback rejects the OB blocker and enhances the blocker tolerance of the RX.

Fig. 2. Proposed CMOS circulator and band-selection LNA with RF SIC
../../Resources/ieie/JSTS.2024.24.4.296/fig2.png

A. C-L-C Nonmagnetic Circulator based on N-path Filter

Fig. 3 shows a schematic of the circulator used for the antenna interface SIC. The circulator employs the topology of an integrated nonmagnetic N-path filter-based C-L-C circulator [14]. In the 3-port circulator, each ${\lambda}$/4 transmission line is replaced by a lumped C-L-C section. External inductors are used to achieve a high Q-factor. This structure enables CMOS integration and unidirectional propagation with minimal losses. Two-port N-path filters can introduce phase nonreciprocity by offsetting the timing of the two sets of switches. This leads to nonreciprocal phase responses (+90$^{\mathrm{o}}$/-90$^{\mathrm{o}}$ in the forward and reverse directions) and enables the creation of a CMOS gyrator. Subsequently, a 3${\lambda}$/4 transmission line can be wound around this gyrator to facilitate signal propagation in a single direction. By connecting the three ports on this transmission line with a spacing of ${\lambda}$/4, a three-port circulator can be realized [15].

Fig. 3. Schematic of the C-L-C nonmagnetic circulator based on N-path filter.
../../Resources/ieie/JSTS.2024.24.4.296/fig3.png

Fig. 4 shows the simulated frequency response of the two-port N-path filter in two directions. Fig. 5 shows the simulated TX IL, RX IL, and TX-RX isolation (i.e., the antenna interface SIC). At 700 MHz, the TX IL and RX IL are 2.2 dB and 2.3 dB, respectively. The TX-RX isolation is greater than 37 dB for a channel bandwidth (CHBW) of 20 MHz.

Fig. 4. Simulated phase response of the two-port N-path filter with two sets of switching time.
../../Resources/ieie/JSTS.2024.24.4.296/fig4.png
Fig. 5. Simulated TX IL, RX IL and TX-RX isolation.
../../Resources/ieie/JSTS.2024.24.4.296/fig5.png

B. N-path Balun-LNA

The proposed band-selection balun-LNA employs D2S N-path band rejection filter (BRF) feedback to eliminate OB blockers and improve blocker tolerance [16]. As shown in Fig. 6, it is based on a gain-boosted N-path filter LNA structure. It consists of two common-source (CS) amplifiers, a differential current balancer (DCB), and an LC tank. Two CS amplifiers (M$_{\mathrm{1,2}}$) perform single-to-differential conversion. The DCB comprises cascade transistors (M$_{\mathrm{3,4}}$) and cross-coupled capacitors (C$_{C1,2}$). It makes the output currents become I$_{OUTP}$ = -I$_{OUTN}$ [16]. The voltage gain of the N-path balun-LNA from the voltage source V$_{S}$ with a source resistance R$_{S}$ to the output V$_{OUT}$ can be expressed as [16]

Fig. 6. N-path balun-LNA.
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(1)
$A_{V,NpathBalun}=\frac{V_{OUT}}{V_{S}}=\frac{(1-g_{m}Z_{FB}(s))Z_{L}(s)}{R_{S}(1+g_{m}Z_{L}(s))+Z_{FB}(s)+Z_{L}(s)}$

where Z$_{FB}$(s) and Z$_{L}$(s) are the impedances of the frequency-selective D2S N-path BRF feedback network and LC tank, respectively. The D2S N-path BRF feedback network can be simplified using an equivalent RLC model (R$_{P}$, C$_{P}$, and L$_{P}$) as follows:

(2)
$ Z_{FB}(s)=R_{SW}+\frac{sL_{P}R_{P}}{s^{2}L_{P}C_{P}R_{P}+sL_{P}+R_{P}} $
(3)
$ R_{P}\approx \frac{N\sin ^{2}(\pi /N)}{N((\pi /N)^{2}-\sin ^{2}(\pi /N))}(R_{S}+R_{SW}+\frac{Z_{L}}{2}) $
(4)
$ C_{P}\approx \frac{\pi ^{2}}{2N\sin ^{2}(\pi /N)}C_{N} $
(5)
$ L_{P}\approx \frac{1}{(2\pi f_{LO})^{2}C_{P}} $

where N is the number of paths, R$_{SW}$ is the switch resistance, and C$_{N}$ is the series capacitance.

Fig. 7 shows the simulated voltage gain of the N-path balun-LNA. It has a voltage gain of more than 20 dB in the low band of the 5G NR sub-6GHz. In addition, the LNA can reject OB blockers by more than 20 dB. Fig. 8 shows the simulated NF of the N-path balun-LNA. The NF is from 3.45 to 3.7 dB across in Band 71/n71, Band 28/n28, and Band 5/n5.

Fig. 7. Simulated voltage gain of the N-path balun-LNA.
../../Resources/ieie/JSTS.2024.24.4.296/fig7.png
Fig. 8. Simulated NF of the N-path balun-LNA.
../../Resources/ieie/JSTS.2024.24.4.296/fig8.png

C. RF SIC

A block diagram of the RF SIC is shown in Fig. 2. The RF SIC consists of an attenuator with C$_{att}$, a source follower, and five delay taps with a 12.5% duty-cycle LO chain. C$_{att}$ attenuates the strong TX signal to prevent saturation of the RF SIC circuits. The amount of attenuation is determined by the ratio of C$_{att}$ to C$_{gs}$ of the source follower. Each delay tap can independently provide individual delays. Each delay tap consists of a delay cell and 2-bit controlled inverter-type g$_{m}$ cell. The delay cell comprises eight delay paths. The delay path employs a time-interleaved switched-capacitor topology, as shown in Fig. 2. This delay cell can provide seven distinct delay options ranging from 250 ps to 1.75 ns with a resolution of 250 ps [17]. Using four delay taps, different predefined values were used to implement distinct fixed group delay settings. The final delay tap was controlled using a multiplexer, providing flexibility in adjusting the group delay and allowing for seven different group delay settings with the use of five delay taps. Fig. 9 shows the simulated group delays. The proposed delay taps could control the group delay from 250 ps to 1.75 ns with a resolution of 250 ps. Furthermore, 2-bit controlled inverter-type g$_{m}$ cells were employed to adjust the magnitude of the RF SIC signal with the SI signal from the CMOS circulator.

Fig. 9. Simulated group delays.
../../Resources/ieie/JSTS.2024.24.4.296/fig9.png

III. SIMULATION RESULTS

The proposed C-L-C nonmagnetic circulator based on an N-path filter and time-domain RF SIC with five delay taps were designed using a 65 nm CMOS process. Fig. 10 illustrates the layout of the CMOS circulator and band-selection balun-LNA with RF SIC circuits. The active area without bond pads was 1.61 mm$^{2}$. A DC bias current of 14 mA was applied at a supply voltage of 1 V.

Fig. 10. Layout of the CMOS circulator and band-selection balun-LNA with RF SIC.
../../Resources/ieie/JSTS.2024.24.4.296/fig10.png

Fig. 11 shows the simulated S$_{11}$ of the circulator. The S$_{11}$ is less than -10 dB. Fig. 12 shows the simulated voltage gain from the antenna port to the LNA output of the circulator and N-path balun-LNA. This shows that the voltage gains from the antenna port to the LNA output are greater than 17 dB in Band 71/n71, Band 28/n28, and Band 5/n5. The OB blocker rejection exceeded 30 dB at the frequency offset of 100 MHz. The simulated SIC performance are illustrated in Fig. 13. The simulated antenna interface SIC and RF SIC are greater than 38 dB and 20 dB at 700 MHz with the CHBW of 20 MHz, respectively. The total SIC exceeded 58 dB for the CHBW of 20 MHz. Fig. 14 shows the simulated NF of the circulator and N-path balun-LNA with RF SIC. RF SIC circuits degrade the NF by 0.5 dB. The IIP3s of the circulator and N-path balun-LNA with RF SIC were also characterized in terms of the presence of in-band (IB) and OB blockers, as shown in Fig. 15 and 16. The two-tone test conditions for the IB IIP3 were $f_{1}$ = $f_{LO}$ + 1 MHz, $f_{2}$ = $f_{LO}$ + 1.1 MHz, and $p_{f1}$ = $p_{f2}$ = -44 dBm. The simulated IB IIP3 with the N-path bandpass filtering was -3.9 dBm to -3.6 dBm. The two-tone test conditions for the OB IIP3 were $f_{1}$ = $f_{LO}$ + 40 MHz, $f_{2}$ = $f_{LO}$ + 81 MHz, $p_{f1}$ = $p_{f2}$ = -44 dBm. The simulated OB IIP3 with the N-path bandpass filtering was 4 dBm to 5 dBm. Compared to the configuration without the N-path filtering, there is around a 2 dB improvement in the IB IIP3 and a notable enhancement of 7-8 dB in the OB IIP3. Table 1 lists the performance summary of the proposed circulator and N-path balun-LNA with RF SIC circuits and a comparison with previous state-of-the-art works. In this study, we implemented RF band selection capabilities in the LNA, taking into account the performance degradation caused by the OB blockers in the IBFD transceiver. Compared to other works, this work exhibits high RF SIC performance. However, it has relatively higher NF characteristics. For fair performance comparison, the following figure of merit (FOM) was used, which is the product of the SIC and fractional bandwidth [23]:

Table 1. Performance summaries and comparison with previous state-of-the-art works

References

RFIC'20

[17]

JSSC'17

[18]

JSSC'15

[19]

ISSCC'17

[20]

ISSCC'19

[21]

RFIC'23

[22]

This Work*

Configuration

LNTA + RF/BB SIC + Mixer

+ TIA

Cir. + LNTA + Mixer + TIA +

BB SIC

LNTA + RF SIC + Mixer + TIA

LNA + RF/BB SIC + Mixer + TIA

Cir. + Mixer +

BB SIC + TIA

LNTA + RF/BB SIC + Mixer + TIA

Cir+ N-path balun-LNA+RF SIC

SIC Topology

Time-domain

Amp.&phase-based

Freq-domain

Time-domain

Time-domain

Time-domain

Time-domain

Process

65nm CMOS

40nm CMOS

65nm CMOS

40nm CMOS

65nm CMOS

65nm CMOS

65nm CMOS

Frequency[GHz]

0.1-1

0.6-0.8

0.8-1.4

1.7-2.2

2.2

0.1-1

0.6-1

#of Taps(domain)

7(RF)+7(BB)

1(BB)

2(RF)

5(RF)+14(BB)

5(BB)

8(RF)+8(BB)

5(RF)

SIC/Bandwidth

@Frequency

30dB/20MHz

@738MHz

22dB/12MHz

@750MHz

20dB/25MHz

@1.37GHz

50dB/42MHz

@1.9GHz

30dB/20MHz

@2.2GHz

27dB/160MHz

@720MHz

58dB/20MHz

@700MHz

Gain

[dB]

15-38

(RFXE)

42

(Cir. + RFXE)

27-42

(RFXE)

20-36

(RFXE)

30

(Cir. + RFXE)

15-40

(RFXE)

17

(Cir. + LNA)

OB Blocker

Rejection (dB)

NO

NO

NO

NO

NO

NO

YES(30**)

NF [dB]

5.3

5.0

4.8

4.0

11.2

4.1

6.6

Pdc [mW]

32

30

44-91

per tap*

11.5

46

22

14

Area [mm]

5.15

1.4

4.8

3.5

5.6

10.9

1.61

FOM [dB]

14.3

4

2.6

33.4

9.5

20.4

42.5*

* Simulation result.

** at 100 MHz offset

Fig. 11. Simulated $S_{11}$ of the circulator.
../../Resources/ieie/JSTS.2024.24.4.296/fig11.png
Fig. 12. Simulated voltage gain from antenna port to LNA output.
../../Resources/ieie/JSTS.2024.24.4.296/fig12.png
Fig. 13. Simulated SIC.
../../Resources/ieie/JSTS.2024.24.4.296/fig13.png
Fig. 14. Simulated NF.
../../Resources/ieie/JSTS.2024.24.4.296/fig14.png
Fig. 15. Simulated IB-IIP3.
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Fig. 16. Simulated OB-IIP3.
../../Resources/ieie/JSTS.2024.24.4.296/fig16.png
(6)
$FOM=10Log(SIC[\mathrm{Mag}]\times \frac{CHBW[\mathrm{MHz}]}{f_{C}[\mathrm{MHz}]})$

where $f_{c}$ is a center frequency. As shown in Table 1, the proposed work achieves an excellent FOM.

IV. CONCLUSIONS

In this study, a CMOS circulator and band-selection N-path balun-LNA with RF SIC circuits were proposed and designed using a 65 nm CMOS technology. The designed CMOS circulator achieved an RX IL of 2.2 dB and a TX IL of 2.3 dB. The circulator and N-path balun-LNA with RF SIC circuits can achieve a total NF of 6.6 dB, an OB blocker rejection of more than 30 dB, and a total SIC of 58 dB for the CHBW of 20 MHz at 700 MHz. The proposed CMOS circulator and N-path balun-LNA with RF SIC circuits can provide antenna interface SIC and RF SIC, and enhance the blocker tolerance of the RX for advanced IBFD transceivers.

ACKNOWLEDGMENTS

This work was supported by the National Research Foundation of Korea(NRF) grant funded by the Korea government(MSIT) (No. 2023R1A2C1003227 and RS-2023-00221494). The chip fabrication and EDA tool were supported by the IC Design Education Center (IDEC), South Korea.

References

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Seokwon Lee
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Seokwon Lee received the B. S. degree in Department of Electronics Engineering, Kangwon National University, Chuncheon, Korea, in 2023. He is currently working toward the M.S. degree in Department of Electronics Engineering, Kangwon National University, Chuncheon, Korea. His research interests include CMOS mmWave/RF/analog integrated circuits and RF system design for wireless communications.

Yonghwan Lee
../../Resources/ieie/JSTS.2024.24.4.296/au2.png

Yonghwan Lee received the B. S. degree in Department of Electronics Engineering, Kangwon National University, Chuncheon, Korea, in 2023. He is currently working toward the M.S. degree in Department of Electronics Engineering, Kangwon National University, Chuncheon, Korea. His research interests include CMOS mmWave/RF/analog integrated circuits and RF system design for wireless communications.

Chanhee Cho
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Chanhee Cho received the B. S. degree in Department of Electronics Engineering, Kangwon National University, Chuncheon, Korea, in 2023. He is currently working toward the M.S. degree in Department of Electronics Engineering, Kangwon National University, Chuncheon, Korea. His research interests include CMOS mmWave/RF/analog integrated circuits and RF system design for wireless communications.

Kuduck Kwon
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Kuduck Kwon received the B.S. and Ph.D. degrees in Electrical Engi-neering and Computer Science from Korea Advanced Institute of Science and Technology (KAIST), in Daejeon, Korea, in 2004 and 2009, respectively. His doctoral research concerned digital TV tuners and dedicated short-range communication (DSRC) systems. From 2009 to 2010, he was a Post-Doctoral Researcher with KAIST, where he studied a surface acoustic wave (SAW)-less receiver architectures and developed 5.8GHz RF transceivers for DSRC applications. From 2010 to 2014, he was a Senior Engineer with Samsung Electronics Co. LTD., Suwon, South Korea, where he has been involved with studies of the SAW-less software-defined receivers and development of CMOS transceivers for 2G/3G/4G cellular applications and receivers for universal silicon tuners. In 2014, he joined the Department of Electronics Engineering, Kangwon National University, Chuncheon, South Korea, where he is currently a Professor. His research interests include CMOS mmWave/RF/analog integrated circuits and RF system design for wireless communications.