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  1. (Major in Intelligent Semiconductor Engineering Chung-Ang University, Seoul 06974, Korea)
  2. (Research and Development Center, Samsung Display, Yongin 17113, Korea)
  3. (Department of Electrical and Electronic Engineering, Joongbu University, Goyang 10279, Korea)
  4. (School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 06974, Korea)



Top-gate self-aligned coplanar structure, indium-gallium-zinc oxide, thin-film transistors, indium composition ratio, self-heating stress, hydrogen

I. INTRODUCTION

Presently, indium-gallium-zinc oxide (IGZO) thin-film transistors (TFTs) are extensively utilized as the backplane in organic light-emitting diode (OLED) displays [1,2]. The widespread adoption of IGZO TFTs can be attributed to their numerous merits, including reasonable field-effect mobilities (${\mu}$$_{\mathrm{FE}}$s), good large-area uniformity, low process temperature, and a high current on-off ratio [3-6]. In OLED displays, IGZO TFTs are primarily employed for implementing pixel and gate driver on array (GOA) circuits [7]. Particularly for GOA circuit applications, it is crucial for IGZO TFTs to exhibit high ${\mu}$$_{\mathrm{FE}}$ and excellent electrical stability under self-heating stress (SHS) conditions, as these features play a vital role in the development of narrow bezel OLED displays [8]. To enhance the electron mobility in IGZO, an increase in the indium composition is necessary, given that In 5s orbitals have a large spatial spread and significant overlap, providing an efficient electron path [9].

In this study, we investigated the impact of the In composition ratio in IGZO on electrical stabilities under SHS in top-gate self-aligned (TG SA) coplanar IGZO TFTs. TG SA coplanar IGZO TFTs are widely employed as the backplane in recent OLED displays due to their small parasitic capacitance and excellent channel length scalability [10,11]. Therefore, the findings from this study are anticipated to contribute to expanding the utility of IGZO TFTs in OLED displays.

II. RESULTS AND DISCUSSION

Fig. 1(a) illustrates a schematic cross-section of the fabricated TG SA coplanar IGZO TFT. The fabrication process for the TG SA coplanar IGZO TFT is detailed as follows: Initially, Al layer was deposited and patterned to create the back gate electrode (acting as a light shield) on a glass substrate. Subsequently, a SiO$_{\mathrm{x}}$ layer was produced using plasma-enhanced chemical vapor deposition (PECVD) as a buffer layer. IGZO layer was then deposited via radio-frequency magnetron sputtering to serve as the channel layer, with the In composition ratio in IGZO adjusted by varying the In content in the IGZO target. Following this, a SiO$_{\mathrm{x}}$ gate insulator was deposited via PECVD, followed by the deposition of a metal (Mo) as the gate electrode. After the deposition and patterning of the Mo gate electrode and SiO$_{\mathrm{x}}$ gate insulator, a SiO$_{\mathrm{x}}$ and SiN$_{\mathrm{x}}$ layer were deposited as an interlayer dielectric (ILD) using PECVD and patterned to create via holes. The source and drain electrodes of Al were deposited and patterned on the n$^{+}$-IGZO source/drain extension regions, where hydrogen diffused from the PECVD-deposited ILD serves as electron donors in IGZO, forming the source/drain extension regions [12]. Finally, for achieving stable and uniform electrical performance, the devices underwent thermal annealing at 340 $^{\circ}$C. Fig. 1(b) depicts the representative semilogarithmic scale plots of transfer characteristics for In-poor and In-rich IGZO TFTs, where In-poor and In-rich IGZO TFTs imply the IGZO TFTs with low and high In composition ratio within IGZO, respectively. Here, V$_{\mathrm{GS}}$, V$_{\mathrm{DS}}$, and I$_{\mathrm{D}}$ represent the gate-to-source voltage, drain-to-source voltage, and drain current, respectively. The TFTs have a width (W)-to-length (L) ratio of 3 ${\mu}$m/5 ${\mu}$m, and measurements were conducted at V$_{\mathrm{DS}}$ = 0.1 V using an Agilent 4156C parameter analyzer in air. Throughout the measurements, both the source and back gate electrodes were grounded. Fig. 1(b) shows that the In-rich IGZO TFT exhibits significantly lower threshold voltage (V$_{\mathrm{TH}}$) compared to the In-poor IGZO TFT. These features are consistent with the results of previous studies [13] and are attributed to the high density of oxygen vacancies (V$_{\mathrm{O}}$s) originating from the weak In–O bond, which can be more easily broken than Zn-O and Ga-O bonds [14]. Fig. 2(a) and (b) show the time dependence of semilogarithmic and linear scale transfer curves measured at V$_{\mathrm{DS}}$ = 0.1 V under SHS from In-poor TG SA coplanar IGZO TFTs.

Fig. 2(c) and (d) show the corresponding curves for In-rich TG SA coplanar IGZO TFTs. The SHS condition used in this experiment was V$_{\mathrm{OV}}$ (= V$_{\mathrm{GS}}$ - V$_{\mathrm{TH}}$) of 30 V and V$_{\mathrm{DS}}$ of 12 V at room temperature in a dark environment. Fig. 3(a)-(c) depict the threshold voltage shift (${\Delta}$V$_{\mathrm{TH}}$), subthreshold swing (SS), and maximum ${\mu}$$_{\mathrm{FE}}$ values extracted from both In-poor and In-rich TG SA coplanar IGZO TFTs after every SHS time. In Fig. 3, V$_{\mathrm{TH}}$ was determined as the V$_{\mathrm{GS}}$ value that results in I$_{\mathrm{D}}$ = W/L ${\times}$ 10 nA and SS was obtained at I$_{\mathrm{D}}$ in the range of 10$^{-12}$ ̶ 10$^{-11}$ A according to the equation:

(1)
SS = (d(logI$_{\mathrm{D}}$)/dV$_{\mathrm{GS}}$)$^{-1}$

${\mu}$$_{\mathrm{FE}}$ values were calculated in the linear operating region as follows

(2)
${\mu}$$_{\mathrm{FE}}$ = (dI$_{\mathrm{D}}$/dV$_{\mathrm{GS}}$)${\times}$(L/WC$_{\mathrm{i}}$V$_{\mathrm{DS}}$)

where, C$_{\mathrm{i}}$ is the gate dielectric capacitance per unit area. From Fig. 2 and 3, it is clearly observed that the time-dependent changes in the measured transfer curves under SHS for In-poor and In-rich IGZO TFTs exhibit distinct patterns. In the In-poor IGZO TFT, the V$_{\mathrm{TH}}$ shows a weak monotonic increase with increasing SHS time. In contrast, in the In-rich IGZO TFT, the V$_{\mathrm{TH}}$ decreases until the stress time reaches 1200 s, after which it sharply increases. Furthermore, in the In-poor IGZO TFT, the SS and maximum ${\mu}$$_{\mathrm{FE}}$ values remain nearly constant regardless of the SHS time. On the other hand, in the In-rich IGZO TFT, the SS and maximum ${\mu}$$_{\mathrm{FE}}$ values show a continuous increase with an increase in the SHS time. The results from Fig. 2 and 3 demonstrate that the In content within the IGZO film in TG SA coplanar IGZO TFTs significantly influences the electrical reliability of the TFTs under SHS.

To unveil the physical mechanisms responsible for the phenomena observed in Fig. 2 and 3, we initially compared the transfer curves measured at V$_{\mathrm{DS}}$ = 0.1 V and V$_{\mathrm{DS}}$ = 15.1 V for both In-poor and In-rich TG SA coplanar IGZO TFTs after applying SHS for different durations. Fig. 4(a) and (b) compare the transfer curves measured at V$_{\mathrm{DS}}$ = 0.1 V and 15.1 V from the In-poor TG SA coplanar 3600 s, respectively. The comparison reveals that the V$_{\mathrm{TH}}$ extracted from both transfer curves exhibits nearly the same value before and after SHS applications. In contrast, the comparison of the transfer curves measured at V$_{\mathrm{DS}}$ = 0.1 V and 15.1 V from the In-rich TG SA coplanar IGZO TFT before and after SHS for 3600 s (Fig. 4(c) and (d)) demonstrates a significant increase in the difference of V$_{\mathrm{TH}}$ extracted from the two transfer curves after the application of SHS. Generally, the decrease in V$_{\mathrm{TH}}$ with increasing V$_{\mathrm{DS}}$ in n-channel field-effect transistors (FETs) has been attributed to the drain-induced barrier lowering (DIBL) phenomenon, which becomes more pronounced as the channel length of the FET decreases [15]. Fig. 5 compares the DIBL coefficient (${\lambda}$) over SHS time for TG SA coplanar IGZO TFTs, where ${\lambda}$ is calculated according to the equation [16]:

(3)
$$\lambda=-\left(V_{\mathrm{TH}}\left(V_{\mathrm{DS}}=15.1 \mathrm{~V}\right)-V_{\mathrm{TH}}\left(V_{\mathrm{DS}}=0.1 \mathrm{~V}\right)\right) /(15.1 \mathrm{~V}-0.1 \mathrm{~V})$$

Fig. 4 and 5 indicate that, with the same gate length (L), the effective channel length (L$_{\mathrm{eff}}$) of the In-rich TG SA coplanar IGZO TFT is shorter than that of the In-poor TG SA coplanar IGZO TFT. Furthermore, the L$_{\mathrm{eff}}$ of the In-rich TG SA coplanar IGZO TFT continues to decrease with SHS, while the In-poor TG SA coplanar IGZO TFT maintains a relatively constant L$_{\mathrm{eff}}$ during SHS.

This phenomenon is possibly attributed to the more pronounced diffusion of hydrogen (H) atoms from the n$^{+}$-IGZO source/drain extension region to the IGZO channel region in the In-rich TG SA coplanar IGZO TFT especially under SHS. It occurs because the concentration of V$_{\mathrm{O}}$, which provides a diffusion path for H dopants in IGZO [17], is higher in In-rich IGZO than in In-poor IGZO due to a larger number of weak In–O bonds [14]. When V$_{\mathrm{O}}$ and H coexist in a single cell, H atom can be trapped in V$_{\mathrm{O}}$ (H$_{\mathrm{O}}$$^{+}$) in IGZO and H$_{\mathrm{O}}$$^{+}$ acts as a shallow donor [18]. Therefore, the more readily diffused H atoms to the IGZO channel region in the In-rich TG SA coplanar IGZO TFT reduce the L$_{\mathrm{eff}}$ of the TFT. Furthermore, they increase the concentration of electrons within the IGZO channel, thereby lowering the V$_{\mathrm{TH}}$. These phenomena become more prominent under the application of SHS, possibly attributed to the increased temperature within the TFT. Fig. 6(a) and (b) are schematic diagrams depicting the diffusion of H atoms from the n$^{+}$-IGZO source/drain extension region to the IGZO channel region in In-poor and In-rich TG SA coplanar IGZO TFTs, respectively. These diagrams illustrate the significant changes in electron concentration and L$_{\mathrm{eff}}$ resulting from SHS-induced H diffusion in the In-rich TG SA coplanar IGZO TFTs. The phenomenon of the V$_{\mathrm{TH}}$ increase with prolonged SHS time in the In-rich TG SA coplanar IGZO TFT is possibly attributed to the conversion of shallow H defect (H$_{\mathrm{O}}$$^{+}$) to the acceptor-like deep defect states. When H$_{\mathrm{O}}$$^{+}$ defect states in IGZO are occupied by electrons for prolonged time under SHS, they can be easily transformed to the acceptor-like subgap states near the valence band maximum originating from the metal-hydrogen (M-H) bonds [19,20], which consume the free electrons in IGZO, leading to a positive ${\Delta}$V$_{\mathrm{TH}}$ in the resulting TFTs.

The continuous increase of SS under SHS in In-rich TG SA coplanar IGZO TFT also can be mainly attributed to the increase in the concentration of shallow subgap states originating from H$_{\mathrm{O}}$$^{+}$ defects within the IGZO channel layer. In addition, the more active thermal state transition of deep V$_{\mathrm{O}}$ into shallow V$_{\mathrm{O}}$$^{2+}$ due to higher concentration of V$_{\mathrm{O}}$ in the In-rich IGZO can be another reason for the SHS-induced continuous increase in SS in In-rich TG SA coplanar IGZO TFTs [21,22]. Fig. 7 depicts the schematic diagram illustrating the charge state transition of defects within the IGZO channel in the In-high TG SA coplanar IGZO TFT under prolonged SHS exposure.

The increase in the maximum ${\mu}$$_{\mathrm{FE}}$ value after an application of SHS in the In-rich TG SA coplanar IGZO TFT is plausibly ascribed to both the enhanced electron percolation conduction due to the increase in channel electron concentration [9] and the phenomenon where the ${\mu}$$_{\mathrm{FE}}$ value calculated through Eq. (2) exhibits larger values than the actual values when L$_{\mathrm{eff}}$ is significantly smaller than L [23].

Fig. 1. (a) Schematic diagram of the fabricated TG SA coplanar IGZO TFTs; (b) Representative semilogarithmic scale plots of transfer characteristics for In-poor and In-rich IGZO TFTs.
../../Resources/ieie/JSTS.2024.24.4.379/fig1-1.png../../Resources/ieie/JSTS.2024.24.4.379/fig1-2.png
Fig. 2. Time dependence of (a) semilogarithmic; (b) linear scale transfer curves measured at VDS= 0.1 V under SHS from In-poor TG SA coplanar IGZO TFTs. Time dependence of (c) semilogarithmic and (d) linear scale transfer curves measured at VDS= 0.1 V under SHS from In-rich TG SA coplanar IGZO TFTs.
../../Resources/ieie/JSTS.2024.24.4.379/fig2-1.png../../Resources/ieie/JSTS.2024.24.4.379/fig2-2.png../../Resources/ieie/JSTS.2024.24.4.379/fig2-3.png../../Resources/ieie/JSTS.2024.24.4.379/fig2-4.png
Fig. 3. Time-dependence of (a) ΔVTH; (b) SS; (c) maximum μFEvalues extracted from both In-poor and In-rich IGZO TFTs under SHS.
../../Resources/ieie/JSTS.2024.24.4.379/fig3-1.png../../Resources/ieie/JSTS.2024.24.4.379/fig3-2.png../../Resources/ieie/JSTS.2024.24.4.379/fig3-3.png
Fig. 4. Transfer curves measured at VDS= 0.1 V and 15.1 V from the In-poor TG SA coplanar IGZO TFT: (a) before; (b) after an application of SHS for 3600 s. Transfer curves measured at VDS= 0.1 V and 15.1 V from the In-rich TG SA coplanar IGZO TFT; (c) before; (d) after an application of SHS for 3600 s.
../../Resources/ieie/JSTS.2024.24.4.379/fig4-1.png../../Resources/ieie/JSTS.2024.24.4.379/fig4-2.png../../Resources/ieie/JSTS.2024.24.4.379/fig4-3.png../../Resources/ieie/JSTS.2024.24.4.379/fig4-4.png
Fig. 5. Comparison of DIBL coefficients (λ) extracted from In-poor and In-rich TG SA coplanar IGZO TFTs at different SHS time points.
../../Resources/ieie/JSTS.2024.24.4.379/fig5.png
Fig. 6. Schematics diagrams depicting the diffusion of H atoms from the n+-IGZO source/drain extension region to the IGZO channel region in (a) In-poor; (b) In-rich TG SA coplanar IGZO TFTs.
../../Resources/ieie/JSTS.2024.24.4.379/fig6.png
Fig. 7. Schematic diagram illustrating the charge state transition of defects within the IGZO channel in the In-high TG SA coplanar IGZO TFT under prolonged SHS exposure: ① Creation of HO+defects; ② Charge state transition from VOto VO2+; ③ Structural transformation of shallow donor states originating from HO+defects to the deep acceptor states originating from M-H bonds.
../../Resources/ieie/JSTS.2024.24.4.379/fig7.png

IV. CONCLUSIONS

In this study, we investigated the impact of the In composition ratio in IGZO on electrical stabilities under SHS (V$_{\mathrm{OV}}$ = 30 V and V$_{\mathrm{DS}}$ = 12 V) in TG SA coplanar IGZO TFTs. In the TG SA coplanar In-poor IGZO TFTs, the V$_{\mathrm{TH}}$ shows a weak monotonic increase with increasing SHS application time. In contrast, the V$_{\mathrm{TH}}$ decreases until the stress time reaches 1200 s, after which it sharply increases in the TG SA coplanar In-rich IGZO TFTs. Besides, while the SS and maximum ${\mu}$$_{\mathrm{FE}}$ values remain nearly constant regardless of the SHS time in the TG SA coplanar In-poor IGZO TFTs, they display a continuous increase with the extended SHS time in the In-rich TG SA coplanar IGZO TFTs. From the experimental results, the abnormal behavior of the TG SA coplanar In-rich IGZO TFT under SHS is possibly attributed to the pronounced diffusion of H atoms from the n$^{+}$-IGZO source/drain extension region to the IGZO channel region, where the concentration of V$_{\mathrm{O}}$ is higher in the In-rich IGZO and provides a facile diffusion path for H dopants in IGZO. The H atoms diffused into the IGZO acts as shallow donors or deep acceptors depending on its concentration and environmental conditions, leading to various operational characteristic changes in the TG SA coplanar In-rich IGZO TFTs over time under SHS.

ACKNOWLEDGMENTS

Y. -G. Kim and C. -E. Oh contributed equally to this work. This research was supported by the Industry technology R&D program (20016051) funded by the Ministry of Trade, Industry & Energy (MOTIE, Korea), National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIT) (2023R1A2C100563441), and Chung-Ang University Research Scholarship Grants in 2023.

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Yeong-Gil Kim
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Yeong-Gil Kim received the B.S. degree in electronic engineering from Seoul National University of Science and Technology, Seoul, South Korea, in 2022. He is currently pursuing the M.S. degree in intelligent semicon-ductor engineering from Chung-Ang University. His current research interest includes the fabrication and reliability study of oxide thin-film transistors.

Chae-Eun Oh
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Chae-Eun Oh received the B.S. degree in nano & semiconductor engineering from Korea Polytechnic University, Jeong-wang, South Korea, in 2021. She is currently pursuing the M.S., Ph.D. degrees in intelligent semiconductor engi-neering from Chung-Ang University. Her current research interest includes reliability study of oxide thin-film transistors.

Ye-Lim Han
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Ye-Lim Han received the B.S. degree in semiconductor physics from Korea University, Sejong, South Korea, in 2022. She is currently pursuing the M.S. degree in intelligent semiconductor engi-neering from Chung-Ang University. Her current research interest includes reliability study of oxide thin-film transistors.

Dong-Ho Lee
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Dong-Ho Lee received the B.S degree in electronic engineering from Gachon University, Gyeonggi-Do, South Korea, in 2020. Since 2020, He is currently pursuing the integrated M.S., Ph.D. degrees in intelligent semiconductor engi-neering from Chung-Ang University. His current research interest includes the reliability study of oxide thin-film transistors.

Joon-Young Lee
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Joon-Young Lee received the B.S. degree in electrical and electronics engineering from Chung-Ang University, Seoul, South Korea, in 2023. He is currently pursuing the M.S. degree in intelligent semicon-ductor engineering from Chung-Ang University. His current research interest includes the fabrication of high performance p-type tellurium thin-film transistors.

Kyoung-Seok Son

Kyoung-Seok Son is a research engineer with the Research and Development Center, Samsung Display, Yongin, South Korea.

Jun Hyung Lim

Jun Hyung Lim received the Ph.D. degree from the Department of Materials Science and Engineering, Sungkyunkwan University, Suwon, South Korea, in 2006. He is in charge of the development of oxide backplane in Samsung Display, Yongin, South Korea.

Ick-Joon Park
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Ick-Joon Park received the Ph.D. degree in Electrical Engineering from Korea Advanced Institute of Science and Technology (KAIST) in 2018. And he had been with the Semiconductor Research & Develop-ment Center, Samsung Electronics as a staff engineer until 2021. He is an assistant professor in the Department of Electrical and Electronic Engineering at Joongbu University since 2021. His research interests include advanced nano electronic devices and logic circuits based on the two-dimensional nanomaterials and oxide/halide semiconductor materials.

Sang-Hun Song
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Sang-Hun Song received his BS degree in Electronics Engineering from Seoul National University in 1886 and his MA and Ph.D. degrees from Princeton University in 1988 and 1997, respectively. His doctoral research studies on magneto-optical and magneto-transport properties of the 2- dimensional carriers in strained semiconductor layers. In 1997, he joined LG Semicon Co. Ltd. As a DRAM circuit designer. In 2001, he joined the School of Electrical and Electronics Engineering at Chung-Ang University in Seoul, where his now a professor. His research interests include semiconductor materials and devices, and their applications to real world electronic systems.

Hyuck-In Kwon
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Hyuck-In Kwon received the B.S., M.S., and Ph.D. degrees in electrical engineering from Seoul National University, Seoul, South Korea, in 1999, 2001, and 2005, respectively. From August 2004 to March 2006, he was a Research Associate with the University of Illinois at Urbana–Champaign. In 2006, he joined the System LSI Division, Samsung Electronics Company, South Korea, where he was a Senior Engineer with the Image Development Team. From September 2007 to February 2010, he was with the School of Electronic Engineering, Daegu University, as a full-time Lecturer and an Assistant Professor. Since 2010, he has been with Chung-Ang University, Seoul, where he is currently a Professor with the School of Electrical and Electronics Engineering. His research interests include CMOS active pixel image sensors, oxide thin-film transistors, and silicon nanotechnologies.