1. FBFET Fabrication by Athena Simulation

We fabricated the FBFET using Silvaco's Athena Simulation. Figure 1 shows the fabrication process of the dual-gate FBFET. First, the FBFET is fabricated on a silicon-on-insulator (SOI) wafer. A 5nm gate oxide layer is formed on the P-type doped silicon through dry oxidation at 900?C for 2 minutes. Afterward, N-type doped polycrystal silicon is deposited for gate photo and patterning, and then followed by channel N-type doping to create a potential well in the energy band as illustrated in Fig. 1(a). Next, 10nm oxide is deposited, followed by dry etch process to form the sidewall spacer as shown in Fig. 1(b). The sidewall spacer not only separates the gate and control gate but also aids in alignment during the control gate patterning process. Following this, the oxide for the control gate is deposited using chemical vapor deposition (CVD). Lastly, we performed the control gate patterning over the potential well formed by the N-type channel as shown in Fig. 1(c). Afterward, with source and drain implantation along with the metal contacts, FBFET fabrication was completed. Table 1 provides a detailed device parameter of the fabricated FBFET by Athena Simulation. These values have been selected as the figures for the FBFET that provide the best performance in the proposed neuron circuit.

Fig. 1. FBFET fabrication schematics. (a) Gate patterning and N- channel doping. (b) Sidewall spacer formed. (c) Deposit oxide by CVD and control gate patterning.}

2. FBFET Characteristics and Simulation Results

We analyzed the FBFET using Silvaco Atlas simulation. The FBFET features a dual-gate and PNPN doping structure ss shown in Fig. 2. This PNPN body doping creates an energy band as depicted in Fig 3. The most notable characteristic is the potential well formed in the body under the control gate and the potential barrier that well forms with the drain region. When a positive voltage is applied to the gate, electrons overcome the barrier on the source side and accumulate in the potential well. The accumulated electrons make the depth of the potential well shallow and reduce the height of the potential barrier along with the applied drain bias, allowing the electrons to move to the drain area ^[21]. This triggers a positive feedback mechanism, rapidly generating current flow and causing the device to turn on with steep switching characteristics.

Fig. 2. Dual gated FBFET device structure.}

Fig. 3. Energy band diagram of the FBFET.}

In addition to structural features and mechanisms, the FBFET has other important characteristics. Firstly, the control gate of the FBFET allows for the adjustment of the potential well depth. As shown in Fig. 4(a), the depth of the potential well increases proportionally with the control gate voltage. A deeper potential well increases the height of the potential barrier formed with the drain region, thereby delaying the turn on time for the FBFET as illustrated in Fig. 4(b). In other words, the FBFET can control threshold voltage by adjusting the voltage applied to the control gate. This characteristic plays the most important role in our study, as it indicates that the turn-on time of the device can be adjusted flexibly.

Fig. 4. Simulation result by control gate voltages adjustment (a) the deeper potential well is formed (b) delaying FBFET turned on.}

Secondly, the FBFET's on/off characteristics depends on various drain voltage. Fig. 5 shows the simulation results of the drain voltage sweep from 1.5 V to 0.6 V. During this process, the gate and control gate voltages were both maintained at 1 V. As the drain voltage increases, a stronger electric field causes more carrier movement, which rapidly reduces the height of the potential barrier with electron accumulation in the potential well, thereby triggering a faster feedback process. This results in a higher drain current. Furthermore, the device turns on through the feedback loop at drain voltages up to 0.8 V. But at lower drain voltages, the potential barrier is not sufficiently reduced, making it impossible to turn on.

Fig. 5. Simulation result of FBFET on/off characteristics and drain current various by drain voltage.}

1. Spiking Neural Networks and Winner Takes All

SNNs are neural networks that aim to mimic the neural activity of neurons and synapses in the biological brain. However, in the biological nervous system, neurons respond competitively to input stimuli, with only the neurons receiving the strongest stimuli becoming activated, while the others are repeatedly inhibited. This mechanism helps the brain to efficiently allocate resources while quickly processing important information. Similarly, research in SNNs has focused on incorporating such mechanisms, known as Winner Takes All (WTA). The WTA mechanism ensures that only the most important neurons are activated through competitive inhibition during the input processing stage, thereby improving the network's efficiency and enabling more effective information processing ^{[21,22,23,24,25,26]}.

2. Mechanism of Winner Takes All

The WTA mechanism operates based on the following principles. When a specific input signal pattern is presented, each neuron increases its membrane potential in response to the excitatory input. This phase is referred to as the input signal accumulation stage for initial activation. As all neurons elevate their membrane potential due to the excitatory signals, the neuron that first reaches the threshold fires and generates a spike. At this point, the activated neuron sends inhibitory signals to other neurons. These inhibitory signals serve to prevent firing by increasing the threshold or decreasing the membrane potential of other neurons within the same layer. This phase is called the competitive inhibition stage or lateral inhibition ^[25,26]. As a result, only a small number of specific neurons win and are selectively activated, while the others are inhibited. And only the activated neurons transmit stimulus signals to the next layer. This process is well illustrated in Fig. 6.

Fig. 6. A simple schematic of an SNN artificial neural network illustrating the WTA mechanism. Only the activated neurons send inhibitory signals to other neurons within the same layer and transmit stimulus signals to the next layer.

The WTA mechanism is characterized by its high biological similarity and energy efficiency. It reflects the structural constraints of the brain's nervous system, where neuronal resources are limited and not all neurons can be activated simultaneously. Additionally, by selectively activating only the winning neurons through competitive processes, energy is conserved overall. Similarly, the biological brain minimizes energy consumption through this method. The neuron circuit proposed in this study accurately reflects the WTA mechanism. Using the characteristics of FBFET, the FBFET increases the threshold of the neuron circuit and inhibits firing in proportion to the magnitude of the inhibitory signals received from the activated neurons.

1. Overall Operation of the Neuron Circuit

Before the neuron is activated, node1 is charged by Vdd1 and receives inhibitory signals through inhibitory synapses from other neurons in the same layer, which are first activated. $C_{mem2}$ charges in response to these inhibitory signals, raising the potential of the membrane2 node. When the neuron receives excitatory signals from the neurons of previous layer, $C_{mem1}$ accumulates the signals, and raising the potential of membrane1. As the excitatory signals continue to accumulate and the potential of membrane1 rises above the threshold voltage of the FBFET, the FBFET turns on, and generating a spike. This indicates that the neuron has fired and is activated. When the FBFET turns on, high-speed switching occurs by steep switching characteristics of FBFET. This causing the voltage of Node1 to drop rapidly. The voltage of Node1 drops sharply to the minimum drain voltage of 0.8V necessary to maintain FBFET activation and then fully drops to 0V through NMOS1. Additionally, the Fig. 8(a) shows a sharp increase in the concentration of electrons and holes. At that moment, the FBFET turns on and which drops back to zero when Node1 drops sharply to the minimum drain voltage of 0.8V necessary to maintain FBFET activation. Lastly, an output is generated through inverter2, and the switch NMOS, which acts as a switch transistor for the excitatory and inhibitory stages, is activated. The activated switch NMOS discharges the capacitors in each stage, lowering the membrane potential to 0. Through the reset operation, Node1's voltage also returns to 1, and preparing for the integration of the next signal.

Fig. 8. Simulation results of neuron circuit's overall operation. (a) Neuron circuit firing occurs when membrane1 potential exceeds the threshold voltage of the FBFET. (b) Electrons and holes increase rapidly when FBFET turns on.

2. Integration of Excitatory and Inhibitory Functions

We propose a neuron circuit that integrates the excitatory and inhibitory functions, which are essential operations of biological neurons, by using a single FBFET to receive both excitatory and inhibitory input signals at the synapse. The operation of the neuron circuit employs the Winner Takes All (WTA) mechanism. Specifically, we implemented a process where the threshold of the neuron circuit is raised by receiving inhibitory signals from the neuron that fires first.

When the neuron circuit receives an inhibitory signal through the inhibitory synapse, it accumulates this signal in the inhibitory membrane capacitor ($C_{mem2}$). The potential of membrane2 increases according to the magnitude of the inhibitory signal received by $C_{mem2}$. Since $C_{mem2}$ is directly connected to the control gate of the FBFET through membrane2, the voltage applied to the control gate increases. As a result, the potential well of the FBFET becomes deeper, leading to a higher threshold voltage for the FBFET.

Fig. 9. Simulation results of neuronal functions by increasing inhibitory membrane potential. (a) Neuron circuit's firing is delayed. (b) Output's inhibition.

The high threshold voltage of the FBFET increases the threshold of membrane1 required for neuron circuit firing. This necessitates a higher potential and more accumulation of excitatory signals in $C_{mem1}$. Fig. 9(a) shows the Simulation results that as the potential in the inhibitory membrane increases, the firing of the neuron circuit is delayed. We found that for every 0.1V increase in the potential of the inhibitory membrane due to the inhibitory signal, the neuron's firing is delayed by 0.07 $\mu$s as shown in Table 2. Additionally, the suppression of neuron firing also leads to a delay in the switching operation of the inverter circuit and the generation of the final output as shown in Fig. 9(b).

In summary, by directly connecting $C_{mem2}$, which accumulates the inhibitory signals received from the neuron that fires first, to the control gate of the FBFET, we set the threshold voltage of FBFET and suppress neuron circuit's firing based on the WTA mechanism. This demonstrates that the integration of neuronal excitatory and inhibitory functions was efficiently implemented using a single FBFET.

Table 2. Value of neuron circuit's firing time by increasing inhibitory membrane potential