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“JSTS has been indexed and abstracted in the SCIE (Science Citation Index Expanded) since Volume 9, Issue 1 in 2009. Furthermore, it continues to maintain its listing in the SCOPUS database and is recognized as a regular journal by the Korea Research Foundation.

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  4. 10.5573/JSTS.2019.19.3.292
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REFERENCES

1 
Lee Jri, Wang Huaide, May 2009, Study of Subharmonically Injection-Locked PLLs, IEEE Journal of Solid-State Circuits, Vol. 44, No. 5, pp. 1539-1553DOI
2 
Ye Sheng, Jansson Lars, Galton Ian, Dec 2002, A Multiple-Crystal Interface PLL With VCO Realignment to Reduce Phase Noise, IEEE Journal of Solid-State Circuits, Vol. 37, No. 12, pp. 1795-1830DOI
3 
Huang Yi-Chieh, Liu Shen-Iuan, Feb 2012, A 2.4GHz sub-harmonically injection-locked PLL with self-calibrated injection timing, in Solid-State Circuits Conference Digest of Technical Papers (ISSCC), pp. 338-340DOI
4 
Grollitsch Werner, Nonis Roberto, Sept 2016, A fractional-N, all-digital injetion-locked PLL with wide tuning range digitally controlled ring oscillator and Bang-Bang phase detection for temperature tracking in 40nm CMOS, in European Solid-State Circuits Conference (ESSCIRC), pp. 201-204DOI
5 
Choi Young-Shig, Sept 2013, A Negative Feedback Looped Voltage-Controlled Ring Oscillator With Frequency Voltage Converter, IEEE Transactions on Microwave Theory and Techniques, Vol. 61, No. 9, pp. 3271-3276DOI
6 
Bui Hung Tien, Savaria Yvon, April 2008, Design of a High-Speed Differential Frequency-to-Voltage Converter and Its Application in a 5-GHz Frequency-Locked Loop, IEEE Transactions on Circuits and Systems I, Vol. 55, No. 3, pp. 766-774DOI