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“JSTS has been indexed and abstracted in the SCIE (Science Citation Index Expanded) since Volume 9, Issue 1 in 2009. Furthermore, it continues to maintain its listing in the SCOPUS database and is recognized as a regular journal by the Korea Research Foundation.

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  4. 10.5573/JSTS.2022.22.3.177
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References

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Jan. 2022., High Bandwidth Memory (HBM3) DRAM, document JESD238, JEDEC Solid State Technology AssociationGoogle Search
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Kim Y., et al. , Apr. 2017, A 2.3-mW 0.01-mm$^{2}$ 1.25-GHz Quadrature Signal Corrector with 1.1-ps Error for Mobile DRAM Interface in 65-nm CMOS, IEEE Trans. Circuits Syst. II, pp. 397-401DOI
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Shin S., et al. , Feb. 2020, A 0.8-to-2.3GHz Quadrature Error Corrector with Correctable Error Range of 101.6ps Using Minimum Total Delay Tracking and Asynchronous Calibration On-Off Scheme for DRAM Interface, in IEEE ISSCC Dig. Tech. Papers, pp. 340-342DOI
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Chae J., et al. , Apr. 2019, A Quadrature Clock Corrector for DRAM Interfaces, with a Duty-Cycle and Quadrature Phase Detector Based on a Relaxation Oscillator, IEEE Trans. Very Large Scale Integr. Syst., pp. 978-982DOI
6 
Ko H., et al. , Feb. 2020, A 3.2-GHz Quadrature Error Corrector for DRAM Transmitters, Using Replica Serializers and Pulse-Shrinking Delay Lines, IEEE Solid-State Circuits Letters, pp. 38-41DOI