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“JSTS has been indexed and abstracted in the SCIE (Science Citation Index Expanded) since Volume 9, Issue 1 in 2009. Furthermore, it continues to maintain its listing in the SCOPUS database and is recognized as a regular journal by the Korea Research Foundation.

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References

1 
J. H. Kim, et al., “Dithered timing spread spectrum clock generation for reduction of electromagnetic radiated emission from high-speed digital system,” Electromagnetic Compatibility, IEEE International Symposium on, Vol. 1, pp. 413-418, Aug., 2002.DOI
2 
K. B. Hardin, et. al., “Spread spectrum clock generation for the reduction of radiated emissions,” Electromagnetic Compatibility, Proceedings of IEEE Symposium on, pp. 227-231, Aug., 1994.DOI
3 
K. Hardin, et al., “Investigation into the Interference Potential of Spread-Spectrum Clock Generation to Broadband Digital Communica-tions,” Electro-magnetic Compatibility, IEEE Transactions on, Vol. 45, No. 1, pp. 10-21, Feb., 2003.DOI
4 
Nurcan Keskin, Huaping Liu, “Practical Considerations for Electromagnetic Interference Suppression Rate with Spread Spectrum Clocking,” Compatibility Magazine, IEEE Electromagnetic, Vol. 5, No. 2, pp. 57-60, Aug., 2016.DOI
5 
S. W. Oh, et al., “A Spread Spectrum Clock Generator for DisplayPort 1.2 with a Hershey-kiss Modulation profile,” semiconductor technology and science, Journal of, Vol. 13, No. 4, pp. 282-290, Aug., 2013.DOI
6 
Deok-Soo Kim and Deog-Kyoon Jeong, "A spread spectrum clock generation PLL with dual-tone modulation profile," VLSI Circuits Digest of Technical Papers., 2005 Symposium on, pp. 96-99, Jun., 2005.DOI
7 
Y. Hsieh and Y. Kao, “A Fully Integrated Spread-Spectrum Clock Generator by Using Direct VCO Modulation,” Circuits and Systems I: Regular Papers, IEEE Transactions on, Vol. 55, No. 7, pp. 1845-1853, Aug., 2008.DOI
8 
J. Lee, et al., “Spread spectrum clock generation for reduced electro-magnetic interference in consumer electronics devices,” Consumer Electronics, IEEE Transactions on, Vol. 56, No. 2, pp. 844-847, May., 2010.DOI
9 
S. W. Hwang, et al., “A 3.5 GHz Spread-Spectrum Clock Generator with a Memoryless Newton-Raphson Modulation Profile,” Solid-State Circuits, IEEE Journal of, Vol. 47, No. 5, pp. 1199-1208, May., 2012.DOI
10 
N. D. Dalt, et al., “An all-digital PLL using random modulation for SSC generation in 65nm CMOS,” Digest of Technical Papers, ISSCC 2013, IEEE International Solid-State Circuits Conference, pp. 252-253, Feb., 2013.DOI
11 
J. Yang, et al., “Phase-Rotator-Based All-Digital Phase-Locked Loop for a Spread-Spectrum Clock Generator,” Circuits and Systems II: Express Briefs, IEEE Transactions on, Vol. 61, No. 11, pp. 880-884, Nov., 2014.DOI
12 
N. Xu, et al., “A spread-spectrum clock generator with FIR-embedded binary phase detection and 1-bit high-order ΔΣ modulation,” A-SSCC 2015, IEEE Asian Solid-State Circuits Conference, pp. 1-4, Nov., 2015.DOI
13 
J. Jun, et al., “A Spread Spectrum Clock Generator With Nested Modulation Profile for a High-Resolution Display System,” Circuits and Systems II: Express Briefs, IEEE Transactions on, Vol. 65, No. 11, pp. 1509-1513, Nov., 2018.DOI
14 
X. Huang, et al., “A 5GHz 200 kHz / 5000 ppm Spread-Spectrum Clock Generator with Calibration-Free Two-Point Modulation Using a Nested-Loop BBPLL," CICC 2019, IEEE Custom Integrated Circuits Conference, pp. 1-4, Apr., 2019.DOI
15 
H. Sun, et al., “A 951-fsrms Period Jitter 3.2% Modulation Range in-Band Modulation Spread-Spectrum Clock Generator,” Solid-State Circuits, IEEE Journal of, Vol. 55, No. 2, pp. 426-438, Feb., 2020.DOI
16 
John Rogers, et al., Integrated Circuit Design for High-Speed Frequency Synthesis, Atrech House, Inc., 2006.URL