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References

1 
Z. Chen, Y. Zhang, X. Tang, J. Li, F. Huang and N. Jiang, “Design of low power consumption, high-speed and wide division ratio range programmable frequency divider,” in 2020 5th International Conference on Integrated Circuits and Microsystems (ICICM 2020), 2020, pp.289-292.DOI
2 
M. Subhanil and K. J. Sanjay, “Design of a low power high speed CML-based divide-by-5 pre-scaler in 180 nm process technology,” in Proceedings of 2020 IEEE Applied Signal Processing Conference (ASPCON 2020), 2020, pp. 303-307.DOI
3 
S. K. Saw, M. Maiti and P. Meher, “Design and analysis of dual modulus prescaler circuit for frequency synthesizer,” in Proceedings - 2019 IEEE International Symposium on Smart Electronic Systems (iSES 2019), 2019, pp. 185-188.DOI
4 
Z. Chen, Z. Wang, H. Liu and W. Wang, “A 26-44 GHz programmable frequency divider for wideband MM-wave,” in 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC 2019), 2019, p. 8754127.DOI
5 
F. Centurelli, G. Scotti, A. Trifiletti and G. Palumbo, “Design of low-voltage power efficient frequency dividers in folded MOS current mode logic,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 68, no. 2, pp. 680-691, 2021.DOI
6 
Y. Zeng, Y. Qiu, F. Zhang and Y. Xia, “Design and realization of 10 GHz low phase noise spread spectrum clock generator,” Journal of Hunan University (Natural Sciences), vol. 43, no. 2, pp. 109-114, 2016.URL
7 
Z. S. Wang and X. Q. Gao, “A programmable frequency divider with low phase noise,” Seimiconductor Technology, vol. 44, no. 12, pp. 916-920, 2019.URL
8 
S. Jia, S. Yan, Y. Wang and G. Zhang, “Design of low-power high-speed divide-by-2/3 prescalers with improved true single-phase clock scheme,” in 2014 Asia-Pacific Microwave Conference Proceedings (APMC 2014), 2014, pp. 241-243.URL
9 
W. Jiang and F. Yu, “A novel high-speed divide-by-3/4 prescaler,” in Proceedings of 2016 IEEE Advanced Information Management, Communicates, Electronic and Automation Control Conference (IMCEC 2016), 2016, pp. 479-482.DOI
10 
Y. Zhang, X. P. Li, Y. T. Zhang, M. Zhang, Y. F. Guo and H. Gao, “A 17 GHz direct digital synthesizer in a InP DHBT Technology,” Sadhana – Academy Proceedings in Engineering Sciences, vol. 46, no. 3, pp. 182, 2021.DOI
11 
Y. Zhang, X. P. Li, Y. T. Zhang, Y. F. Guo, Y. Zhang and H. Gao, “32.2GHz full adder designed with TLE method in a InP DHBT technology,” Journal of Semiconductor Technology and Science, vol. 21, no. 6, pp. 438-448, 2021.URL
12 
Y. Yang, W. Chen, L. Wei and J. Tang, “Design of programmable frequency divider with extendable division range,” Research & Progress of SSE, vol. 36, no. 5, pp. 393-397, 2016.URL