Mobile QR Code QR CODE

References

1 
M. Kang, et al. “Improving read disturb characteristics by using double common source line and dummy switch architecture in multi level cell NAND flash memory with low power consumption.” Japanese Journal of Applied Physics 50.4S (2011): 04DD03.DOI
2 
Y. Kim, et al. “Three-dimensional NAND flash architecture design based on single-crystalline stacked array.” IEEE Transactions on Electron Devices 59.1 (2011): 35-45. DOI: 10.1109/TED. 2011.2170841DOI
3 
Y. Kim and M. Kang, “Down-coupling phenomenon of floating channel in 3D NAND flash memory.” IEEE Electron Device Letters 37.12 (2016): 1566-1569. DOI: 10.1109/LED.2016.2619903DOI
4 
M. Kang and Y. Kim. “Natural local self-boosting effect in 3D NAND flash memory.” IEEE Electron Device Letters 38.9 (2017): 1236-1239. DOI: 10.1109/LED.2017.2736541DOI
5 
S. Han, Y. Jeong, H. Jhon, and M. Kang. “Investigation of inhibited channel potential of 3D NAND flash memory according to word-line location.” Electronics 9.2 (2020): 268. DOI: 10.3390/electronics9020268DOI
6 
K.-T. Park, et al. “Three-dimensional 128 Gb MLC vertical NAND flash memory with 24-WL stacked layers and 50 MB/s high-speed programming.” IEEE Journal of Solid-State Circuits 50.1 (2014): 204-213. DOI: 10.1109/JSSC.2014.2352293DOI
7 
A. Fayrushin, et al. “Numerical study of non-circular pillar effect in 3D-NAND flash memory cells.” 2019 IEEE Workshop on Microelectronics and Electron Devices (WMED). IEEE, 2019. DOI: 10.1109/WMED.2019.8714183DOI
8 
A. Goda and P. Krishna. “Scaling directions for 2D and 3D NAND cells.” 2012 International Electron Devices Meeting. IEEE, (2012): 2-1. DOI: 10.1109/IEDM.2012.6478961DOI
9 
K.-T. Kim, et al. “The effects of taper - angle on the electrical characteristics of vertical NAND flash memories.” IEEE Electron Device Letters 38.10 (2017): 1375-1378. DOI: 10.1109/LED.2017.2747631DOI
10 
Lee, Yongmin, Sungbak Kim, and Hyungcheol Shin. "Analysis and Modeling of Program Disturbance by Hot Carrier Injection in 3D NAND Flash Memory Using TCAD." JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 19.6 (2019): 571-576.DOI
11 
Kim, Yu-Jin, and Jun-Young Park. "Investigation of Mechanical Stability during Electro-thermal Annealing in a 3D NAND Flash Memory String." JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 22.3 (2022): 139-145.DOI
12 
D-G. Yoon, J-M. Sim, and Y-H. Song. “Mechanical stress in a tapered channel hole of 3D NAND flash memory.” Microelectronics Reliability 143 (2023): 114941. DOI: 10.1016/j.microrel.2023.114941DOI
13 
Y. Li, et al. “128Gb 3b/Cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode.” 2012 IEEE International Solid-State Circuits Conference. IEEE, 2012. DOI: 10.1109/ISSCC.2012.6177080DOI
14 
Yi, Su-in, and Jungsik Kim. "Novel program scheme of vertical NAND flash memory for reduction of Z-interference." Micromachines 12.5 (2021): 584.DOI
15 
T-H. Hsu, et al. “A comprehensive study of double-density hemi-cylindrical (HC) 3-D NAND flash.” IEEE Transactions on Electron Devices 67.12 (2020): 5362-5367. DOI: 10.1109/TED.2020.3029999DOI
16 
L. Zhang, et al. “Modeling shortchannel effect of elliptical gate-allaround MOSFET by effective radius.” IEEE Electron Device Letters 32.9 (2011): 1188-1190. DOI: 10.1109/LED.2011.2159358DOI