| Title |
Over-Input Protection Circuit Design of High Power Amplifier in Time Division Duplexing System |
| Authors |
Young-Lak Kim ; Chun-Hyung Cho |
| DOI |
http://doi.org/10.5207/JIEIE.2025.39.1.59 |
| Keywords |
DPD power amplifier; Peak power protection; Power amplifier; TDD system |
| Abstract |
This study proposes a method to address issues that may arise during the linearization process of a high-power amplifier (HPA) used in TDD-based communication equipment and to protect the device. When operating digital predistortion (DPD) or performing frequency alignment (FA), noise peaks can enter the HPA together with the RF control output signal, creating transient over-input signals. These excessive input levels can potentially destroy the main transistor (TR), which is the core component of the HPA. However, this research demonstrates that such damage can be prevented. Experimental tests conducted on a standalone module showed that over-input signals could be about 10dB higher than the control output signal, and at these high input levels, the main TR was found to be damaged. To protect the device, a peak limiter was applied, reducing the over-input signal by 15dB. In other words, although the over-input signal was originally 10dB above the control output, after passing through the peak limiter, it became 5dB below the control output. This confirms that the over-input signal was sufficiently mitigated. Furthermore, a protective comparison test was conducted by applying the method to an actual HPA. Under an over-input condition, the circuit output was reduced by more than 20dBm, thereby lowering the level of the signal entering the HPA’s main TR and effectively protecting it. |