(Ok-Hyeong Lee)
1iD
(Hyung-Woo Lee)
2iD
(Kyo-Beum Lee)
†iD
-
(M.S. student, Department of Electrical and Computer Engineering, Ajou University,
Korea)
-
(Ph.D. student, Department of Electrical and Computer Engineering, Ajou University,
Korea)
Copyright © The Korean Institute of Illuminating and Electrical Engineers(KIIEE)
Key words
Dead time compensation, DPWM, IPMSM, Switching loss reduction, Two-level inverter
1. Introduction
An inverter is a power conversion device that generates variable-frequency and variable-voltage
AC power from a DC source. It utilizes switching power devices and gate drivers to
control and drive permanent magnet synchronous motors (PMSMs). PMSMs are driven using
inverters. Depending on the application, either two-level inverters or multilevel
inverters are employed. Multilevel inverters are typically utilized in high-voltage
or grid-connected systems where high current quality and superior control performance
are required. However, two-level inverters are more widely adopted due to their relatively
lower implementation cost and reduced control complexity.
Techniques such as pulse width modulation (PWM) and space vector pulse width modulation
(SVPWM) are generally employed in inverter to produce AC power[1]. In inverter design, it is crucial to consider power losses, particularly switching
and conduction losses, as these factors influence the performance and overall efficiency
of inverters[2]. To reduce switching losses, the discontinuous pulse width modulation(DPWM) technique
has been proposed[3-5]. The DPWM technique enhances efficiency in PMSM drive system by maintaining the power
semiconductor in either an on or off state over specified intervals, offering advantages
over the SVPWM technique[6].
The DPWM technique includes a discontinuous region within one fundamental cycle, during
which a specific switching devices remain in either the on or off state for 120°.
This approach reduces the number of switching events to two-thirds compared to continuous
pulse width modulation techniques, thus achieving an average reduction in switching
losses of 33%[7, 8]. In driving a balanced load with the DPWM technique, the discontinuous region is
configured based on the phase voltage. This setup reduces switching events when the
absolute value of the phase current reaches its maximum. However, when driving an
inductive load such as a PMSM, the phase difference between voltage and current limits
the effectiveness of setting the discontinuous region solely based on phase voltage.
This method does not sufficiently minimize switching events during the interval when
phase current is at its maximum[9]. When driving a PMSM, a phase current-based DPWM technique can be applied to set
the discontinuous region according to the phase current. This approach improves the
effectiveness of switching loss reduction achieved by DPWM.
Two series-connected switching devices within a leg of an inverter cause a short circuit
when operated simultaneously. The excessive current flow resulting from the short
circuit can damage switching devices. Therefore, the switches are configured to operate
in a complementary manner. Since the turn-off time of an actual switching device is
always longer than its turn-on time, there is a risk of a momentary short circuit
in switching devices configured to operate complementary in series[10-16]. To prevent this, dead time is commonly applied by inserting a sufficient period
during which both switching devices are off
A Discontinuous Pulse Width Modulation Method Based on a Current Angle for Driving
Interior Permanent Magnet Synchronous Motor with Dead Time Compensation between their
on/off signals. During dead time, the output voltage of the inverter is passively
determined based on the current flow direction through the switching devices, meaning
the inverter cannot actively control its output voltage. Consequently, an error arises
between the reference voltage and the output voltage, distorting the output voltage[17-19]. This voltage distortion introduces harmonic components into the current flowing
through the PMSM, which increases the total harmonic distortion (THD) of the current.
Therefore, a compensation method is required to address the voltage distortion induced
by dead time.
This paper proposes a method to reduce switching losses and decrease the THD of the
current in an interior permanent magnet synchronous motor (IPMSM) drive systems through
a phase current-based DPWM technique combined with a dead time compensation component.
To reduce switching losses in IPMSM drive systems, the phase current-based DPWM technique
is applied by setting the offset voltage according to the phase angle of current so
that the switching device is clamped in the region where the absolute value of the
phase current is at its maximum. The polarity of current is identified using the phase
angle, and the dead time compensation voltage is set according to the polarity of
current. By applying the dead time compensation voltage, the THD of the current is
improved, reducing torque ripple and enhancing the efficiency of the IPMSM drive system.
In this paper, a two-level inverter is utilized as the topology for motor drives since
it is more widely applied across various motor drive applications. The validity of
the proposed method is verified through simulations and experiments.
2. Modeling of a Two-Level Inverter for Driving IPMSM
2.1 Modeling of IPMSM
Fig. 1 depicts the circuit diagram of IPMSM drive system using a two-level inverter. VDC
and iabc represent DC-link voltage and three-phase current. Fig. 2 illustrates the interior structure of the IPMSM. In Fig. 2, the three- phase windings are simplified for representation, and the air gap length
varies depending on the rotor position. This characteristic creates differences in
inductance in the rotor reference d-q frame, which generates reluctance torque. The
stator voltage equation of an IPMSM is expressed in the d-q frame, as shown in equation
(1).
where the subscripts d and q refer to the d-axis and q-axis in the rotor reference
frame. vd and vq represent the stator voltages, and id and iq denote the stator currents.
Ld and Lq are the inductances on the d-q frame, respectively, p is the differential
operator, Rs is the stator resistance, and ωr and λf denote the rotor electrical angular
speed and the flux linkage of the permanent magnet, respectively.
The output torque Te of the IPMSM is generated by both the d-axis and q-axis currents,
and the torque equation is given by equation (2).
where P represents the number of poles. Generally, the q-axis current is the primary
component responsible for torque generation, as it interacts with the magnetic flux
produced by the permanent magnets to generate torque, contributing to the majority
of the output torque of the IPMSM.
Fig. 1. Circuit diagram of IPMSM drive system using two-level inverter
Fig. 2. Interior structure of the IPMSM
2.2 Principles and Effects of Dead Time
A single leg of a two-level inverter consists of two switching devices. The upper
and lower switches of a leg operate in a complementary manner to prevent leg short-circuit
conditions. This configuration avoids the risk of a large current flow that damages
components when the two switching devices connected in series within the same leg
of an inverter are turned on simultaneously. In an ideal inverter, the two switching
devices operate in a complementary manner. However, because the switching devices
used in actual applications are not ideal, there is a possibility that both devices
could conduct simultaneously. The deviation from these ideal conditions arises due
to the presence of rising and falling times during the on/off transitions of actual
switching devices. If gating signals are applied simultaneously with the switching
state transition, both switching devices may conduct at the same time. This condition
can lead to a short-circuit fault in inverters.
Dead time is implemented to prevent short-circuit faults caused by the non-ideal characteristics
of the switching devices. Dead time is implemented by delaying the turn-on process
of one the switching devices in the leg for a specific interval after the turn-off
operation of the other switch considering the turn-off duration. The required dead
time varies depending on the type and capacity of the switching device. For instance,
a typical dead time of 1μs to 3μs is generally applied in the case of IGBTs.
3. Proposed IPMSM Drive Method for a Two-Level Inverter
3.1 DPWM Operation of Inverter
The phase voltage-based DPWM technique cannot minimize switching losses when the power
factor of the load is not in unity. Such effects occur even when the discontinuous
region is set within the region of the maximum phase voltage. This difficulty occurs
as the phase current lags or leads due to the phase difference when using phase voltage
as the reference. Switching losses increase with higher current magnitudes, so switching
in regions where the absolute value of the current is high results in even greater
losses.
Fig. 3 illustrates the waveforms of phase voltage and phase current for an inductive load.
When driving an inductive load such as an IPMSM, the phase current lags behind the
phase voltage. Setting the discontinuous region based on the phase voltage leads to
frequent switching during high-current periods. This switching method reduces the
effectiveness of switching loss reduction achieved by DPWM. For this reason, a DPWM
technique based on phase current rather than phase voltage is necessary. Setting the
discontinuous region in the region where the absolute value of the phase current is
at its peak facilitates a reduction in switching losses.
Fig. 3. Waveforms of the phase voltage and the phase current under the inductive load
condition
3.2 Phase Current-Based DPWM Method
As previously described, the conventional phase voltage-based method for setting the
discontinuous region reduces the effectiveness of switching loss reduction. To address
this drawback, the discontinuous region is set at the point where the absolute value
of the current is maximized based on the current phase angle. While driving an IPMSM,
switching losses across the entire system can be reduced by minimizing switching at
the point where the phase current is highest. This approach enables efficient IPMSM
operation by adjusting the discontinuous region to reflect the phase of the current.
Fig. 4 illustrates the discontinuous region in the phase current-based DPWM technique. Ipeak
and Sa represent the peak value of current and switching function of a-phase. For
a-phase, the inverter is clamped to State 1 during the 60° interval where the a-phase
current reaches its maximum, and clamped to state 0 during the 60° interval where
the a-phase current is at its most negative. The same approach is applied to b-phases
and c-phase to implement the phase current-based DPWM.
The phase current-based DPWM technique can be implemented by equations (5) to (7) with offset voltages.
Equation (5) represents the difference θd between the phase of the phase current θcurrent and
the phase of the phase voltage θvolt. Equation (6) illustrates the process of transforming the phase of the reference voltage to align
with the phase of the phase current. In equation (6), vdi* and vqi* denote the reference voltages on the d-q frame in the rotor reference
frame based on phase current, vd* and vq* represent the reference voltages on the
d-q frame. When the range of the offset voltage voff is set as shown in equation (7), the discontinuous region of DPWM is defined based on the phase angle of the phase
current. vmax* and vmin* denote the maximum and minimum values of the phase current-based
reference voltage, and vmax and vmin represent the maximum and minimum values of the
reference voltage, respectively.
Fig. 4. Discontinuous region of the phase current-based DPWM method
3.3 Dead Time Compensation Technique
Conventional dead time voltage compensation techniques face challenges in accurately
determining the current polarity near zero-crossing points when current ripple or
measurement noise is present, as these can cause fluctuations in current polarity.
To address this issue, a method that determines the current polarity based on the
phase of the current is employed[20]. By using the phase of the current to determine polarity, the polarity is defined
within the controller based on the current phase, leading to more accurate results
than directly measuring the actual current. The current polarity based on the current
phase is expressed as equation (8).
where θcurrent denotes the phase angle of the current. By setting the bandwidth of
the current controller sufficiently high, it can be assumed that there is no phase
delay in the current output by the inverter, allowing polarity to be determined based
on the phase angle. This method of determining current polarity according to the phase
angle of the current is robust against current ripple and sensor noise, enabling simple
implementation of compensation voltage without being affected by current quality.
4. Simulation Results
The performance of the proposed DPWM method with dead time compensation was verified
throughsimulation results. The simulations were conducted with PSIM software. To analyze
the effect of dead time, a dead time of 2μs was applied. Table 1 show the simulation parameters of the IPMSM used in the simulations.
Fig. 5 shows the waveform comparing SVPWM and DPWM during speed control of the IPMSM. Initially,
the IPMSM was driven using SVPWM, and from 1 second in the simulation waveform, it
switched to a phase voltage-based conventional DPWM. The THD of the waveform was measured
using the features provided by the PSIM tool. The load torque of IPMSM was 1.1Nm (10%
of rated torque) and the speed of IPMSM was 450rpm (10% of rated speed). The THD was
4.0% in SVPWM, but after switching to DPWM, the THD increased to 5.3%.
Fig. 6 shows the waveform comparing the proposed phase current-based dead time compensation
DPWM technique with the conventional DPWM technique. This simulation was also conducted
under a load torque of 1.1Nm and a speed of 450rpm, with both techniques performing
DPWM, resulting in switch clamping. In this case, the THD decreased from 5.3% to 4.2%.
The compensated dead time applied was 2μs.
Fig. 5. Simulation results of SVPWM and conventional DPWM
Fig. 6. Simulation results of conventional DPWM and proposed DPWM
Fig. 7. Experimental setup used for validating the proposed method
Table 1. Parameters of the IPMSM
Parameters
|
Value
|
Unit
|
Rated power
|
7
|
kW
|
Rated speed
|
4500
|
rpm
|
Stator resistance (Rs)
|
0.3155
|
Ω
|
d-axis inductance (Ld)
|
10.68
|
mH
|
q-axis inductance (Lq)
|
14.73
|
mH
|
Permanent magnet flux (λf)
|
0.136
|
Wb
|
Number of poles (P)
|
6
|
-
|
5. Experimental Results
The performance and validity of the switching loss and THD reduction techniques were
verified through experiments. Fig. 7 shows the experimental setup used for validating the proposed method. The experimental
setup consists of a control board, a two-level inverter, and an IPMSM with a load
motor. The control board utilizes a DSP (TMS320F28377), and the parameters of the
IPMSM used in the experiment are the same as those listed in Table 1.
Fig. 8 shows the experimental results of the phase current-based DPWM technique across different
speed ranges. The load torque was set to 3.3Nm, the dead time to 2μs, and dead time
voltage compensation was not applied. The speed of IPMSM was 1000rpm in Fig. 8(a) and 1800 rpm in Fig. 8(b). The modulation index (MI) of the inverter was 0.5 and 0.9, respectively, for each
case. In Fig. 8, the reference voltage was clamped to 0.5 times the VDC in the 60° interval where
each phase current reached its maximum, and clamped to -0.5 times the DC input voltage
in the 60° interval where each phase current reached its minimum.
Additionally, there was an improvement in switching loss reduction with the phase
current-based DPWM technique across speed ranges. Under the conditions of Fig. 8(a), applying the phase current-based DPWM technique reduced inverter losses from 81W
to 77W with the SVPWM technique. Under the conditions of Fig. 8(b), inverter losses decreased from 128W to 120W. Since the RMS values of the phase current
remained the same before and after applying the DPWM technique in both conditions,
the conduction losses of the inverter remained consistent. Typically, inverter losses
consist of the sum of switching and conduction losses, indicating that the phase current-based
DPWM technique effectively reduces switching losses. However, since the dead time
compensation technique was not applied, ripple appeared in the phase current where
the pole voltage reference was clamped.
Fig. 9 presents the experimental results of the phase current-based DPWM technique with
dead time voltage compensation across different speed ranges. In Fig. 9, the load torque was set as 3.3Nm, and a dead time was set as 2μs. The speed range
was 1000 rpm in Fig. 9(a) and 1800 rpm in Fig. 9(b), with MI of 0.5 and 0.9, respectively. Compared to the waveforms in Fig. 8, where the dead time voltage compensation was not applied, the current ripple in
the waveforms of Fig. 9 was reduced. When measuring the THD of the phase current, it was found that for an
MI of 0.5 the THD decreased from 8.1% to 7.5%, reducing by approximately 0.6% after
applying the dead time voltage compensation technique. For the case when MI was 0.9,
the THD decreased from 6.56% to 6.12%, a reduction of approximately 0.44%. With the
dead time voltage compensation technique applied, the distortion of the output voltage
of inverter was compensated. As a result, the THD of the phase current was decreased.
Fig. 8. Experimental results of the phase current-based DPWM technique according to
speed (a) 1000rpm condition (b) 1800rpm condition
Fig. 9. Experimental results of the phase current-based DPWM technique with dead time
voltage compensation (a) 1000rpm condition (b) 1800rpm condition
6. Conclusion
This paper proposed a method to reduce switching losses and lower the THD of current
in an IPMSM drive system by combining a phase current-based DPWM technique with dead
time compensation. A phase current-based DPWM was employed to determine the offset
voltage based on the phase angle of current. In this method, the switch is clamped
when the absolute value of the phase current reaches its peak to reduce switching
losses. The compensation voltage was applied according to the current polarity to
reduce the THD of the stator current. The application of the phase current-based DPWM
and dead time compensation techniques improved the efficiency of the IPMSM drive system.
The validity of the proposed method was confirmed through simulation and experimental
results.
References
K.-B. Lee, “Advanced Power Electronics,” Munundang, 2019.

A. K. Sadigh, V. Dargahi, and K. A. Corzine, “Analytical determination of conduction
and switching power losses in flying-capacitor-based active neutral-point-clamped
multilevel converter,” IEEE Trans. Power Electron., vol. 31, no. 8, pp. 5473-5494,
2016.

S.-M. Kim, E.-J. Lee, J.-S. Lee, and K.-B. Lee, “An improved phase-shifted DPWM method
for reducing switching loss and thermal balancing in cascaded H-bridge multilevel
inverter,” IEEE Access, vol. 8, pp. 187072-187083, 2020.

M. H. V. Reddy, T. B. Reddy, B. R. Reddy, and M. S. Kalavathi, “Discontinuous PWM
technique for the asymmetrical dual inverter configuration to eliminate the overcharging
of DC-link capacitor,” IEEE Trans. Ind. Electron., vol. 65, no. 1, pp. 156-166, 2018.

J. C. Giacomini, L. Michels, M. C. Cavalcanti, and C. Rech, “Modified discontinuous
PWM strategy for three-phase grid- connected PV inverters with hybrid active-passive
damping scheme,” IEEE Trans. Power Electron., vol. 35, no. 8, pp. 8063-8073, 2020.

Q. An, et al., “Dual-space vector control of open-end winding permanent magnet synchronous
motor drive fed by dual inverter,” IEEE Trans. Power Electron., vol. 31, no. 12, pp.
8329-8342, 2016.

B. Zhang, et al., “Novel three-layer discontinuous PWM method for mitigating resonant
current and zero crossing distortion in Vienna rectifier with an LCL filter,” IEEE
Trans. Power Electron., vol. 36, no. 12, pp. 14478-14490, 2021.

H. W. van der Broeck, H. C. Skudelny, and G. V. Stanke, “Analysis and realization
of a pulsewidth modulator based on voltage space vectors,” IEEE Trans. on Ind. Appl.,
vol. 24, no. 1, pp. 142-150, 1988.

H. W. Lee, S. J. Jang, and K. B. Lee, “Advanced DPWM method for switching loss reduction
in isolated DC type dual inverter with open-end winding IPMSM,” IEEE Access, vol.
11, pp. 2700-2710, 2023.

T. Qiu, X. Wen, and F. Zhao, “Adaptive-linear-neuron-based dead-time effects compensation
scheme for PMSM drives,” IEEE Trans. Power Electron., vol. 31, no. 3, pp. 2530-2538,
2015.

Y. Park and S.-K. Sul, “A novel method utilizing trapezoidal voltage to compensate
for inverter nonlinearity,” IEEE Trans. Power Electron., vol. 27, no. 12, pp. 4837-4846,
2012.

Y. Park and S.-K. Sul, “Implementation schemes to compensate for inverter nonlinearity
based on trapezoidal voltage,” IEEE Trans. on Ind. Appl., vol. 50, no. 2, pp. 1066-1073,
2014.

S.-Y. Kim, W. Lee, M.-S. Rho, and S.-Y. Park, “Effective dead-time compensation using
a simple vectorial disturbance estimator in PMSM drives,” IEEE Trans. Ind. Electron.,
vol. 57, no. 5, pp. 1609-1614, 2009.

J.-W. Choi and S.-K. Sul, “Inverter output voltage synthesis using novel dead time
compensation,” IEEE Trans. Power Electron., vol. 11, no. 2, pp. 221-227, 1996.

H. Zhao, Q. J. Wu, and A. Kawamura, “An accurate approach of nonlinearity compensation
for VSI inverter output voltage,” IEEE Trans. Power Electron., vol. 19, no. 4, pp.
1029-1035, 2004.

C. -H. Choi, K. -R. Cho, and J. -K. Seok, “Inverter nonlinearity compensation in the
presence of current measurement errors and switching device parameter uncertainties,”
IEEE Trans. Power Electron., vol. 22, no. 2, pp. 576-583, 2007.

C. Attaianese and G. Tomasso, “Predictive compensation of dead-time effects in VSI
feeding induction motors,” IEEE Trans. on Ind. Appl., vol. 37, no. 3, pp. 856-863,
2001.

H.-S. Kim, H.-T. Moon, and M.-J. Youn, “On-line dead-time compensation method using
disturbance observer,” IEEE Trans. Power Electron., vol. 18, no. 6, pp. 1336-1345,
2003.

N. Urasaki, T. Senjyu, K. Uezato, and T. Funabashi, “An adaptive dead-time compensation
strategy for voltage source inverter fed motor drives,” IEEE Trans. Power Electron.,
vol. 20, no. 5, pp. 1150-1160, 2005.

J.-W. Lim, H. Bu, and Y. Cho, “Novel dead-time compensation strategy for wide current
range in a three-phase inverter,” Electronics, vol. 8, no. 1, pp. 92-119, 2019.

Biography
Ok-Hyeong Lee received his B.S. degree in Management from Korea National Open University,
Seoul, Korea, in 2023, and he is currently working toward an M.S. degree in Electrical
and Computer Engineering from Ajou University, Suwon, Korea. He has been with Realtech
Co., Ltd., Yongin, Korea. His research interests include electric machine drives and
power conversion.
Hyung-Woo Lee received his B.S. and M.S. degrees in Electrical and Computer Engineering
from Ajou University, Suwon, Korea, in 2020 and 2022, respectively, where he is presently
working towards a Ph.D. degree in Electrical and Computer Engineering. His research
interests include dual inverters, electric machine drives, and power conversion.
Kyo-Beum Lee received a B.S. and M.S. degrees in Electrical and Electronic Engineering
from Ajou University, Suwon, Korea, in 1997 and 1999, respectively. He received a
Ph.D. degree in Electrical Engineering from the Korea University, Seoul, Korea, in
2003. From 2003 to 2006, he was with the Institute of Energy Technology, Aalborg University,
Aalborg, Denmark. From 2006 to 2007, he was with the Division of Electronics and Information
Engineering, Jeonbuk National University, Jeonju, Korea. In 2007, he joined the Department
of Electrical and Computer Engineering, Ajou University, Suwon, Korea. He is an associated
editor of the IEEE Transactions on Power Electronics. His research interests include
electric machine drives, renewable power generations, and electric vehicle applications.