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Title [LETTER] SCR-based ESD Protection Circuit with Low Trigger Voltage and High Robustness by Inserting the NMOS Structure
Authors Byung-Seok Lee(Byung-Seok Lee) ; Yong-Seo Koo(Yong-Seo Koo)
DOI https://doi.org/10.5573/JSTS.2019.19.3.300
Page pp.300-304
ISSN 1598-1657
Keywords ESD ; electrostatic discharge ; trigger voltage ; holding voltage ; SCR
Abstract This paper proposes the SCR-based new structural ESD protection circuit with the fast trigger voltage and the high robustness characteristics by inserting the NMOS structure to the SCR-based ESD protection circuit. The proposed ESD protection circuit was fabricated by Bipolar CMOS DMOS (BCD) 0.18 μm process and verified by the Transmission Line Pulse (TLP) Electrostatic Discharge (ESD) protection measures. The proposed structure has a fast trigger voltage characteristic and high It2 (Second Breakdown) characteristic because of the additional operation by inserting NMOS structure. In order to analyze the operating characteristics and electrical characteristics of the proposed circuit, fabricated chip was measured by TLP measurement, Human Body Model (HBM) and Machine Model (MM). In the measurement result, it has Trigger voltage 9.53 V and Second Breakdown Current 6.89 A. Also it has high robustness of HBM 6 kV, MM 550 V.