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Title [REGULAR PAPER] A 12-bit 180 MS/s Current-steering DAC with Cascaded Local-element Matching Topologies
Authors Jun-Sang Park;Tai-Ji An;Hee-Cheol Choi;Gil-Cho Ahn;Seung-Hoon Lee
DOI https://doi.org/10.5573/JSTS.2020.20.1.099
Page pp.99-104
ISSN 1598-1657
Keywords Digital-to-analog converter (DAC); current-steering; cascaded local-element-matching (C-LEM); full-thermometer-coded; source follower
Abstract This paper proposes a 12-bit 180 MS/s current-steering digital-to-analog converter (DAC) with cascaded local-element matching (C-LEM) schemes to significantly reduce the required number of current cells in the DAC to 28, a reduction of 99.32 % compared to the amount of required in the conventional 12-bit full thermometer-coded switching techniques. The bias circuits in the DAC use simple source follower-based level shifters to obtain the required bias voltages, simplifying the circuit configuration considerably. The prototype DAC shows the measured differential non-linearity (DNL) and integral non-linearity (INL) within 0.50 LSB and 0.78 LSB, respectively. The DAC achieves a peak spurious-free-dynamic range (SFDR) of 65.33 dB at 180 MS/s. The output current and total power of the prototype DAC are 10 mA and 38.2 mW, with analog and digital power supplies of 3.3 V and 1.8 V, respectively.