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REFERENCES

1 
Chou F. T., et al , 2015 ISCAS 2015 Digest of Technical Papers IEEE International Symposium on, A novel 12-bit current-steering DAC with two reference currents, Circuits and SystemsDOI
2 
Park J., Lee S. C., Lee S. H., Vol 35, 3 V 10-bit 70 MHz D/A converter for video applications, Electron. Letters, Vol. , No. , pp. -DOI
3 
Shen M.-H., Huang P.-C., Sep, A Low Cost Calibrated DAC for High-Resolution Video Display System, Very Large Scale Integration Systems, IEEE Transactions on, Vol. 20, No. 9, pp. 1743-1747DOI
4 
Lee H., Kim J., Agu, A 12-bit 220 MS/s Area-efficient DAC in 65nm CMOS with Calibration-DAC Assisted Linearity Enhancement, Semicon-ductor and Technology and Sience, Journal of}, Vol. 18, No. 4, pp. 433-437DOI
5 
Liu R., Pileggi L., Jul, Low-Overhead Self-Healing Methodology for Current Matching in Current-Steering DAC, Circuits and Systems II, IEEE Transactions on, Vol. 62, No. 7, pp. 651-655DOI
6 
Greenwald E., et al , Jan, A CMOS Current Steering Neurostimulation Array with Integrated DAC Calibration and Charge Balancing, Biomedical Circuits and Systems, IEEE Transactions on, Vol. 11, No. 2, pp. 324-335DOI
7 
Lin W. T., Huang H. Y., Kuo T. H., Mar, A 12-bit 40 nm DAC Achieving SFDR 70 dB at 1.6 GS/s and IMD 61dB at 2.8 GS/s With DEMDRZ Technique, Solid-State Circuits, IEEE Journal of, Vol. 49, No. 3, pp. 708-717DOI
8 
Mao W., et al , May, High Dynamic Performance Current-Steering DAC Design With Nested-Segment Structure, Very Large Scale Integration Systems, IEEE Transactions on, Vol. 26, No. 5, pp. 995-999DOI
9 
Mehrjoo M. S., Buckwalter J. F., May, A 10 bit, 300 MS/s Nyquist Current-Steering Power DAC with 6 V$_{\mathrm{P-P}}$ Output Swing, Solid-State Circuits, IEEE Journal of, Vol. 49, No. 6, pp. 1408-1418DOI
10 
Kuo K. C., Wu C. W., Aug, A Switching Sequence for Linear Gradient Error Compensation in the DAC Design, Circuits and Systems II, IEEE Transactions on, Vol. 58, No. 8, pp. 502-506DOI
11 
Park G., Song M., May, A CMOS Current-Steering D/A Converter with Full-Swing Output Voltage and a Quaternary Driver, Circuits and Systems II, IEEE Transactions on, Vol. 62, No. 5, pp. 441-445DOI
12 
Shen M.-H., Tsai J.-H., P.-C Huang , May, Random Swapping Dynamic Element Matching Technique for Glitch Energy Minimization in Current-Steering DAC, Circuits and Systems II, IEEE Transactions on, Vol. 57, No. 5, pp. 369-373DOI
13 
Mukhopadhyay I., et al , Mar, Dual-Calibration Technique for Improving Static Linearity of Thermometer DACs for I/O, Very Large Scale Integration Systems, IEEE Transactions on, Vol. 2 4, No. 3, pp. 1050-1058DOI
14 
Bastos J., et al , Dec, A 12-bit Intrinsic Accuracy High-Speed CMOS DAC, Solid-State Circuits, IEEE Journal of, Vol. 33, No. 12, pp. 1959-1969DOI
15 
Chou F.-T., Hung C.-C., Jun, Glitch Energy Reduction and SFDR Enhancement Techniques for Low-Power Binary-Weighted Current-Steering DAC, Very Large Scale Integration Systems, IEEE Transactions on, Vol. 24, No. 6, pp. 2407-2411DOI
16 
Kim S.-N., et al , Sep, A 6-bit 3.3 GS/s Current-Steering DAC with Stacked Unit Cell Structure, Semiconductor and Technology and Sience, Journal of, Vol. 12, No. 3, pp. 270-277DOI
17 
Li X., et al , Aug, A 14 Bit 500 MS/s CMOS DAC Using Complementary Switched Current Sources and Time-Relaxed Interleaving DRRZ, Circuits and Systems I: Fundamental Theory and Applica\-tions, IEEE Transactions on, Vol. 61, No. 8, pp. 2337-2347DOI
18 
Olieman E., A.-J Annema , Nauta B., Mar, An Interleaved Full Nyquist High-Speed DAC Technique, Solid-State Circuits, IEEE Journal of, Vol. 50, No. 3, pp. 704-713DOI